421 Commits

Author SHA1 Message Date
Pol Henarejos
8c25e9be87 Upgrade to v3.6.2
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
v7.0
2024-11-09 15:13:43 +01:00
Pol Henarejos
5a52afe826 Upgrade Pico Keys SDK to v7.0
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-09 14:56:50 +01:00
Pol Henarejos
5bce3e4c83 Remove Secure boot build flags, since are added to rescue.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-09 00:23:22 +01:00
Pol Henarejos
c877e51240 Add compile flags for optimization build in ESP32.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-09 00:20:16 +01:00
Pol Henarejos
9018ebb55d Fix secure otp build for non rp2350.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:45:50 +01:00
Pol Henarejos
621d5553e1 Fix PHY missing headers.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:25:11 +01:00
Pol Henarejos
37e3058015 Add command to enable secure boot and secure lock via rescue.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:24:33 +01:00
Pol Henarejos
daddb7fa57 No options on secure boot and lock in PHY.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:24:16 +01:00
Pol Henarejos
4da9b89d90 Add function to enable secure boot and secure lock.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:24:05 +01:00
Pol Henarejos
200413c317 Add macro to make checks.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-08 19:23:45 +01:00
Pol Henarejos
758d7b88cd Add product and mcu to info in rescue mode.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-07 20:00:30 +01:00
Pol Henarejos
cf36c2988c Add DEV key to OTP.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-07 00:15:58 +01:00
Pol Henarejos
f38e0619b8 Remove printf
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-06 23:42:55 +01:00
Pol Henarejos
5f27c0d75d Fix esp32 build with wcid.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-06 17:11:39 +01:00
Pol Henarejos
3dbf969e12 WCID interface is always enabled.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-06 17:02:38 +01:00
Pol Henarejos
e85d77c084 Fix version header.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 18:36:59 +01:00
Pol Henarejos
6625678c30 Rename CCID_ codes to PICOKEY_
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 18:21:24 +01:00
Pol Henarejos
242e357a74 Add rescue app to communicate via webUSB.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 18:03:19 +01:00
Pol Henarejos
5399149b9d Increase number of hosted apps to 8.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 18:03:00 +01:00
Pol Henarejos
0edb1f370f Fix HID report descriptors.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 15:23:34 +01:00
Pol Henarejos
27a685b931 Fix usb initialization for emulation.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 09:42:27 +01:00
Pol Henarejos
e4a3124876 Fix PHY for led neopixel.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 00:29:13 +01:00
Pol Henarejos
0638409ff8 Refactor PHY to support more flexible and scalable architecture.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-05 00:29:13 +01:00
Pol Henarejos
802df9e705 Add flags to enable secure boot and secure boot lock via firmware on boot.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-04 18:31:34 +01:00
Pol Henarejos
6f7d92a591 Add parse phy byte string.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-11-04 18:25:05 +01:00
Pol Henarejos
62c3d0c360 Add OTP read raw.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-10-28 00:15:13 +01:00
Pol Henarejos
6216cd24be Make public read/write RP2350 OTP functions.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-10-13 20:22:16 +02:00
Pol Henarejos
32eed01508 Use non-guarded OTP reads to avoid bus faults.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-10-13 20:21:43 +02:00
Pol Henarejos
84c3efd782 Let detect macos target.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-10-01 13:29:09 +02:00
Pol Henarejos
cec3b4c7f6 Do not pack file_t to avoid misalignments.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-10-01 13:28:52 +02:00
Pol Henarejos
e2b3eacd89 Fix indent getting version
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-30 09:07:52 +02:00
Pol Henarejos
a816b6f747 Added PHY options to control the brigthness of the LED and its dimming.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-27 20:55:49 +02:00
Pol Henarejos
058473dce9 Add LED compatibility for other boards.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-27 19:57:58 +02:00
Pol Henarejos
037e760879 For compatibility with single led boards, mounted/not mounted led modes have to blink.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-27 19:38:40 +02:00
Pol Henarejos
50e54ed984 Fix float casting, otherwise it is always 0.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-27 19:37:57 +02:00
Pol Henarejos
e32870bedb Merge pull request #5 from benallard/led
Add brightness to the LED mode.
2024-09-27 19:17:06 +02:00
Benoît Allard
c0012fe2a2 Use the correct shifting value 2024-09-26 19:21:21 +02:00
Benoît Allard
01d1856fcc Add brightness to the LED mode. 2024-09-25 23:20:48 +02:00
Benoît Allard
7a0b67f3cb led: Rename 'blink' to 'mode' 2024-09-25 21:46:33 +02:00
Pol Henarejos
fe396bc5b8 Fix ESP & emulation build.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-25 19:40:22 +02:00
Pol Henarejos
15d81be6de Specify led driver for each board.
Quina matada!

Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-25 19:28:58 +02:00
Pol Henarejos
268ab824ce Add cmake scripts.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-25 19:28:27 +02:00
Pol Henarejos
86674fd6ca Fix build for WS2812 boards.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-25 12:00:50 +02:00
Pol Henarejos
30df1d9202 Fix build for boards with WS2812.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-25 11:33:14 +02:00
Pol Henarejos
839e8244d9 Fix header in Linux. Fixes #63
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-19 18:25:41 +02:00
Pol Henarejos
739e9f1b98 Added ESP32 OTP support.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-16 00:51:43 +02:00
Pol Henarejos
cafb6a4774 Not used
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-16 00:51:43 +02:00
Pol Henarejos
1bf323c367 Fix build.
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-13 08:47:32 +02:00
Pol Henarejos
3d52921ef5 Add sha256_alt to use sha256 hardware in RP2350.
Other boards and SHA224 use mbedtls implementation.

Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-13 00:26:44 +02:00
Pol Henarejos
f8a05f4832 Fix maxPower and dwProtocols (recover T=0).
Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>
2024-09-12 19:42:49 +02:00