mirror of
https://github.com/vincentmli/bpfire.git
synced 2026-04-09 18:45:54 +02:00
Alten PCMCIA Code aus dem Installer entfernt.
Unattended Installation bearbeitet. HTTP/FTP-Installation nun moeglich. git-svn-id: http://svn.ipfire.org/svn/ipfire/trunk@449 ea5c0bd1-69bd-2848-81d8-4f18e57aeed8
This commit is contained in:
ms
@@ -1,7 +1,7 @@
|
||||
#
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||||
# Automatically generated make config: don't edit
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||||
# Linux kernel version: 2.6.16.42
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||||
# Tue Mar 6 19:03:24 2007
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# Linux kernel version: 2.6.16.42-ipfire
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# Fri Mar 16 12:03:27 2007
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#
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CONFIG_X86_32=y
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CONFIG_SEMAPHORE_SLEEPERS=y
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@@ -360,7 +360,7 @@ CONFIG_IP_PIMSM_V1=y
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CONFIG_IP_PIMSM_V2=y
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CONFIG_ARPD=y
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CONFIG_SYN_COOKIES=y
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# CONFIG_IPSEC_NAT_TRAVERSAL is not set
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CONFIG_IPSEC_NAT_TRAVERSAL=y
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CONFIG_INET_AH=y
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CONFIG_INET_ESP=y
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CONFIG_INET_IPCOMP=y
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@@ -1,7 +1,7 @@
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#
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||||
# Automatically generated make config: don't edit
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||||
# Linux kernel version: 2.6.16.42
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# Tue Mar 6 19:03:10 2007
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# Linux kernel version: 2.6.16.42-ipfire
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# Fri Mar 16 12:03:27 2007
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#
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CONFIG_X86_32=y
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CONFIG_SEMAPHORE_SLEEPERS=y
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@@ -366,7 +366,7 @@ CONFIG_IP_PIMSM_V1=y
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CONFIG_IP_PIMSM_V2=y
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CONFIG_ARPD=y
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CONFIG_SYN_COOKIES=y
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# CONFIG_IPSEC_NAT_TRAVERSAL is not set
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CONFIG_IPSEC_NAT_TRAVERSAL=y
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CONFIG_INET_AH=y
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CONFIG_INET_ESP=y
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CONFIG_INET_IPCOMP=y
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15
lfs/wget
15
lfs/wget
@@ -32,7 +32,11 @@ THISAPP = wget-$(VER)
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DL_FILE = $(THISAPP).tar.gz
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DL_FROM = $(URL_IPFIRE)
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DIR_APP = $(DIR_SRC)/$(THISAPP)
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TARGET = $(DIR_INFO)/$(THISAPP)
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ifeq "$(LFS_PASS)" "install"
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TARGET = $(DIR_INFO)/$(THISAPP)-install
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else
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TARGET = $(DIR_INFO)/$(THISAPP)
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endif
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###############################################################################
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# Top-level Rules
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@@ -72,8 +76,15 @@ $(subst %,%_MD5,$(objects)) :
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$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects))
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@$(PREBUILD)
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@rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE)
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cd $(DIR_APP) && ./configure --prefix=/usr --with-ssl --disable-nls --disable-ipv6
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ifeq "$(LFS_PASS)" "install"
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cd $(DIR_APP) && ./configure --prefix=/ --disable-nls --disable-ipv6
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cd $(DIR_APP) && make $(MAKETUNING)
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cd $(DIR_APP)/src && install -m 755 wget /install/initrd/bin
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else
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cd $(DIR_APP) && ./configure --prefix=/usr --with-ssl \
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--disable-nls --disable-ipv6
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cd $(DIR_APP) && make $(MAKETUNING)
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cd $(DIR_APP) && make install
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endif
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@rm -rf $(DIR_APP)
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@$(POSTBUILD)
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1
make.sh
1
make.sh
@@ -562,6 +562,7 @@ buildinstaller() {
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installmake util-linux
|
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installmake pciutils
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installmake zlib
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installmake wget
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installmake libxml2
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installmake dbus
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installmake hal
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@@ -24,7 +24,11 @@ case "${1}" in
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evaluate_retval
|
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boot_mesg "Setting hostname to ${HOSTNAME}..."
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hostname ${HOSTNAME}
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if [ -z "$DOMAINNAME" ]; then
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hostname ${HOSTNAME}
|
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else
|
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hostname ${HOSTNAME}.${DOMAINNAME}
|
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fi
|
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evaluate_retval
|
||||
;;
|
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|
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@@ -1,5 +1,5 @@
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#
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# $Id: Makefile,v 1.6 2004/02/24 21:24:10 alanh Exp $
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# Installer Makefile by Michael Tremer for IPFire.org
|
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#
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CC = gcc
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@@ -24,7 +24,7 @@ clean :
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######
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||||
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OBJS=main.o ide.o cdrom.o nic.o net.o config.o ../libsmooth/libsmooth.o \
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pcmcia.o usb.o scsi.o
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usb.o scsi.o unattended.o
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install: $(OBJS)
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$(LINK) $(OBJS) -o $@ $(LIBS)
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@@ -42,9 +42,6 @@ int write_disk_configs(struct devparams *dp);
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int write_lang_configs( char *lang);
|
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int write_ethernet_configs(struct keyvalue *ethernetkv);
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/* pcmcia.c */
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char * initialize_pcmcia (void);
|
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|
||||
/* usb.c */
|
||||
int initialize_usb();
|
||||
int write_usb_modules_conf();
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@@ -52,3 +49,6 @@ int write_usb_modules_conf();
|
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/* scsi.c */
|
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int try_scsi(char *dev);
|
||||
int get_boot(char *dev);
|
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/* unattended.c */
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int unattended_setup(struct keyvalue *unattendedkv);
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@@ -23,7 +23,6 @@ char *mylog;
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char **ctr;
|
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char *pcmcia = NULL;
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extern char url[STRING_SIZE];
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extern char *en_tr[];
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@@ -57,135 +56,12 @@ long calc_swapsize(long memory, long disk) {
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return memory*2;
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}
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int unattended_setup(struct keyvalue *unattendedkv) {
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struct keyvalue *mainsettings = initkeyvalues();
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struct keyvalue *ethernetkv = initkeyvalues();
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FILE *file, *hosts;
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char commandstring[STRING_SIZE];
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char domainname[STRING_SIZE];
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char hostname[STRING_SIZE];
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char keymap[STRING_SIZE];
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char language[STRING_SIZE];
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char timezone[STRING_SIZE];
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char theme[STRING_SIZE];
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char green_address[STRING_SIZE];
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char green_netmask[STRING_SIZE];
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char green_netaddress[STRING_SIZE];
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char green_broadcast[STRING_SIZE];
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char root_password[STRING_SIZE];
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char admin_password[STRING_SIZE];
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findkey(unattendedkv, "DOMAINNAME", domainname);
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findkey(unattendedkv, "HOSTNAME", hostname);
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findkey(unattendedkv, "KEYMAP", keymap);
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findkey(unattendedkv, "LANGUAGE", language);
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findkey(unattendedkv, "TIMEZONE", timezone);
|
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findkey(unattendedkv, "THEME", theme);
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findkey(unattendedkv, "GREEN_ADDRESS", green_address);
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findkey(unattendedkv, "GREEN_NETMASK", green_netmask);
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findkey(unattendedkv, "GREEN_NETADDRESS", green_netaddress);
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findkey(unattendedkv, "GREEN_BROADCAST", green_broadcast);
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findkey(unattendedkv, "ROOT_PASSWORD", root_password);
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findkey(unattendedkv, "ADMIN_PASSWORD", admin_password);
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/* write main/settings. */
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replacekeyvalue(mainsettings, "DOMAINNAME", domainname);
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replacekeyvalue(mainsettings, "HOSTNAME", hostname);
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replacekeyvalue(mainsettings, "KEYMAP", keymap);
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replacekeyvalue(mainsettings, "LANGUAGE", language);
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replacekeyvalue(mainsettings, "TIMEZONE", timezone);
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replacekeyvalue(mainsettings, "THEME", theme);
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writekeyvalues(mainsettings, "/harddisk" CONFIG_ROOT "/main/settings");
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freekeyvalues(mainsettings);
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||||
/* do setup stuff */
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fprintf(flog, "unattended: Starting setup\n");
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/* network */
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fprintf(flog, "unattended: setting up network configuration\n");
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(void) readkeyvalues(ethernetkv, "/harddisk" CONFIG_ROOT "/ethernet/settings");
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replacekeyvalue(ethernetkv, "GREEN_ADDRESS", green_address);
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replacekeyvalue(ethernetkv, "GREEN_NETMASK", green_netmask);
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replacekeyvalue(ethernetkv, "GREEN_NETADDRESS", green_netaddress);
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replacekeyvalue(ethernetkv, "GREEN_BROADCAST", green_broadcast);
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replacekeyvalue(ethernetkv, "CONFIG_TYPE", "0");
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replacekeyvalue(ethernetkv, "GREEN_DEV", "eth0");
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write_ethernet_configs(ethernetkv);
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freekeyvalues(ethernetkv);
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/* timezone */
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unlink("/harddisk/etc/localtime");
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snprintf(commandstring, STRING_SIZE, "/harddisk/%s", timezone);
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link(commandstring, "/harddisk/etc/localtime");
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/* hostname */
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fprintf(flog, "unattended: writing hostname.conf\n");
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if (!(file = fopen("/harddisk" CONFIG_ROOT "/main/hostname.conf", "w")))
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{
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errorbox("unattended: ERROR writing hostname.conf");
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return 0;
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}
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fprintf(file, "ServerName %s\n", hostname);
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fclose(file);
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fprintf(flog, "unattended: writing hosts\n");
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if (!(hosts = fopen("/harddisk/etc/hosts", "w")))
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{
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errorbox("unattended: ERROR writing hosts");
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return 0;
|
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}
|
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fprintf(hosts, "127.0.0.1\tlocalhost\n");
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fprintf(hosts, "%s\t%s.%s\t%s\n", green_address, hostname, domainname, hostname);
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fclose(hosts);
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fprintf(flog, "unattended: writing hosts.allow\n");
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if (!(file = fopen("/harddisk/etc/hosts.allow", "w")))
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{
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errorbox("unattended: ERROR writing hosts.allow");
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return 0;
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}
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fprintf(file, "sshd : ALL\n");
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fprintf(file, "ALL : localhost\n");
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fprintf(file, "ALL : %s/%s\n", green_netaddress, green_netmask);
|
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fclose(file);
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fprintf(flog, "unattended: writing hosts.deny\n");
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if (!(file = fopen("/harddisk/etc/hosts.deny", "w")))
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{
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errorbox("unattended: ERROR writing hosts.deny");
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return 0;
|
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}
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fprintf(file, "ALL : ALL\n");
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fclose(file);
|
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/* set root password */
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fprintf(flog, "unattended: setting root password\n");
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snprintf(commandstring, STRING_SIZE,
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"/sbin/chroot /harddisk /bin/sh -c \"echo 'root:%s' | /usr/sbin/chpasswd\"", root_password);
|
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if (mysystem(commandstring)) {
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errorbox("unattended: ERROR setting root password");
|
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return 0;
|
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}
|
||||
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/* set admin password */
|
||||
fprintf(flog, "unattended: setting admin password\n");
|
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snprintf(commandstring, STRING_SIZE,
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||||
"/sbin/chroot /harddisk /usr/sbin/htpasswd -c -m -b " CONFIG_ROOT "/auth/users admin '%s'", admin_password);
|
||||
if (mysystem(commandstring)) {
|
||||
errorbox("unattended: ERROR setting admin password");
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
char *langnames[] = { "Deutsch", "English", NULL };
|
||||
char *shortlangnames[] = { "de", "en", NULL };
|
||||
char **langtrs[] = { de_tr, en_tr, NULL };
|
||||
char hdletter, cdletter;
|
||||
char hdletter;
|
||||
char harddrive[5], sourcedrive[5]; /* Device holder. */
|
||||
struct devparams hdparams, cdromparams; /* Params for CDROM and HD */
|
||||
int cdmounted = 0; /* Loop flag for inserting a cd. */
|
||||
@@ -193,15 +69,12 @@ int main(int argc, char *argv[])
|
||||
char commandstring[STRING_SIZE];
|
||||
char *installtypes[] = { "CDROM/USB", "HTTP/FTP", NULL };
|
||||
int installtype = CDROM_INSTALL;
|
||||
char insertmessage[STRING_SIZE];
|
||||
char insertdevnode[STRING_SIZE];
|
||||
int choice;
|
||||
char shortlangname[10];
|
||||
char message[1000];
|
||||
char title[STRING_SIZE];
|
||||
int allok = 0;
|
||||
int allok_fastexit=0;
|
||||
int unmount_before=0;
|
||||
struct keyvalue *ethernetkv = initkeyvalues();
|
||||
FILE *handle, *cmdfile;
|
||||
char line[STRING_SIZE];
|
||||
@@ -210,20 +83,10 @@ int main(int argc, char *argv[])
|
||||
long memory = 0;
|
||||
long system_partition, boot_partition, root_partition, swap_file;
|
||||
int scsi_disk = 0;
|
||||
int pcmcia_disk = 0;
|
||||
int pcmcia_cdrom = 0;
|
||||
int scsi_cdrom = 0;
|
||||
int ide_cdrom = 0;
|
||||
int fdisk = 0;
|
||||
int hardyn = 0;
|
||||
char *yesnoharddisk[] = { "NO", "YES", NULL };
|
||||
char *yesno[] = { "NO", "YES", NULL };
|
||||
char green[STRING_SIZE];
|
||||
int unattended = 0;
|
||||
struct keyvalue *unattendedkv = initkeyvalues();
|
||||
char packages[STRING_SIZE];
|
||||
int serial_console = 0;
|
||||
char megabridge[STRING_SIZE];
|
||||
int hardyn = 0;
|
||||
|
||||
setlocale (LC_ALL, "");
|
||||
sethostname( SNAME , 10);
|
||||
@@ -619,8 +482,16 @@ int main(int argc, char *argv[])
|
||||
errorbox(ctr[TR_UNABLE_TO_MOUNT_LOG_FILESYSTEM]);
|
||||
goto EXIT;
|
||||
}
|
||||
|
||||
snprintf(commandstring, STRING_SIZE, "/bin/tar -C /harddisk -xvjf /cdrom/" SNAME "-" VERSION ".tbz2");
|
||||
|
||||
if (installtype == URL_INSTALL) {
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/bin/wget -q -O - %s/" SNAME "-" VERSION ".tbz2 | /bin/tar -C /harddisk -xvjf -", url);
|
||||
}
|
||||
|
||||
if (installtype == CDROM_INSTALL) {
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/bin/tar -C /harddisk -xvjf /cdrom/" SNAME "-" VERSION ".tbz2");
|
||||
}
|
||||
|
||||
if (runcommandwithprogress(60, 4, title, commandstring, INST_FILECOUNT,
|
||||
ctr[TR_INSTALLING_FILES]))
|
||||
@@ -634,11 +505,11 @@ int main(int argc, char *argv[])
|
||||
|
||||
/* touch the modules.dep files */
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/sbin/chroot /harddisk /usr/bin/touch /lib/modules/%s/modules.dep",
|
||||
"/bin/touch /harddisk/lib/modules/%s-ipfire/modules.dep",
|
||||
KERNEL_VERSION);
|
||||
mysystem(commandstring);
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/sbin/chroot /harddisk /usr/bin/touch /lib/modules/%s-smp/modules.dep",
|
||||
"/bin/touch /harddisk/lib/modules/%s-ipfire-smp/modules.dep",
|
||||
KERNEL_VERSION);
|
||||
mysystem(commandstring);
|
||||
|
||||
@@ -706,7 +577,7 @@ int main(int argc, char *argv[])
|
||||
}
|
||||
|
||||
/* Update /etc/fstab */
|
||||
replace( "/harddisk/etc/fstab", "DEVICE", hdparams.devnode);
|
||||
replace("/harddisk/etc/fstab", "DEVICE", hdparams.devnode);
|
||||
|
||||
/* Install bootsplash */
|
||||
mysystem("/bin/installbootsplash.sh");
|
||||
@@ -725,14 +596,10 @@ int main(int argc, char *argv[])
|
||||
|
||||
EXIT:
|
||||
fprintf(flog, "Install program ended.\n");
|
||||
fflush(flog);
|
||||
fclose(flog);
|
||||
|
||||
if (!(allok))
|
||||
newtWinMessage(title, ctr[TR_OK], ctr[TR_PRESS_OK_TO_REBOOT]);
|
||||
|
||||
newtFinished();
|
||||
|
||||
freekeyvalues(ethernetkv);
|
||||
|
||||
if (allok && !allok_fastexit)
|
||||
@@ -743,23 +610,30 @@ EXIT:
|
||||
printf("Unable to mount proc in /harddisk.");
|
||||
else
|
||||
{
|
||||
if (unattended) {
|
||||
fprintf(flog, "Entering unattended setup\n");
|
||||
if (unattended_setup(unattendedkv)) {
|
||||
snprintf(commandstring, STRING_SIZE, "/bin/sleep 10");
|
||||
runcommandwithstatus(commandstring, "Unattended installation finished, system will reboot");
|
||||
} else {
|
||||
errorbox("Unattended setup failed.");
|
||||
goto EXIT;
|
||||
}
|
||||
}
|
||||
|
||||
newtFinished();
|
||||
fflush(flog);
|
||||
fclose(flog);
|
||||
|
||||
if (!unattended) {
|
||||
if (system("/sbin/chroot /harddisk /usr/local/sbin/setup /dev/tty2 INSTALL"))
|
||||
printf("Unable to run setup.\n");
|
||||
}
|
||||
else {
|
||||
fprintf(flog, "Entering unattended setup\n");
|
||||
unattended_setup(unattendedkv);
|
||||
snprintf(commandstring, STRING_SIZE, "/bin/sleep 10");
|
||||
runcommandwithstatus(commandstring, "Unattended installation finished, system will reboot");
|
||||
}
|
||||
|
||||
if (system("/bin/umount /harddisk/proc"))
|
||||
printf("Unable to umount /harddisk/proc.\n");
|
||||
printf("Unable to umount /harddisk/proc.\n");
|
||||
}
|
||||
}
|
||||
|
||||
fcloseall();
|
||||
|
||||
if (swap_file) {
|
||||
|
||||
@@ -36,7 +36,7 @@ int checktarball(char *file, char *message)
|
||||
/* remove any successive /'s */
|
||||
while (url[strlen(url)-1] == '/') { url[strlen(url)-1] = '\0'; }
|
||||
|
||||
snprintf(commandstring, STRING_SIZE, "/bin/wget -s -O /dev/null %s/%s", url, file);
|
||||
snprintf(commandstring, STRING_SIZE, "/bin/wget -q --spider -O /dev/null %s/%s", url, file);
|
||||
if (!(runcommandwithstatus(commandstring, ctr[TR_CHECKING])))
|
||||
{
|
||||
done = 1;
|
||||
@@ -63,7 +63,7 @@ static int gettarballurl(char *url, char *message)
|
||||
char title[STRING_SIZE];
|
||||
int rc;
|
||||
|
||||
sprintf (title, "%s v%s - %s", NAME, VERSION, SLOGAN);
|
||||
sprintf (title, "%s %s - %s", NAME, VERSION, SLOGAN);
|
||||
rc = newtWinEntries(title, message,
|
||||
60, 5, 5, 50, entries, ctr[TR_OK], ctr[TR_CANCEL], NULL);
|
||||
|
||||
|
||||
@@ -1,335 +0,0 @@
|
||||
/*
|
||||
* PCMCIA bridge device probe
|
||||
*
|
||||
* This file is part of the IPCop Firewall.
|
||||
*
|
||||
* IPCop is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* IPCop is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with IPCop; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* The initial developer of the original code is David A. Hinds
|
||||
* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
|
||||
* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
|
||||
*
|
||||
* $Id: pcmcia.c,v 1.6.2.2 2005/01/31 15:49:43 alanh Exp $
|
||||
*
|
||||
*/
|
||||
|
||||
#include "install.h"
|
||||
#include "pcmcia.h"
|
||||
|
||||
#ifdef __GLIBC__
|
||||
#include <sys/io.h>
|
||||
#else
|
||||
#include <asm/io.h>
|
||||
#endif
|
||||
|
||||
extern FILE *flog;
|
||||
|
||||
/*====================================================================*/
|
||||
|
||||
typedef struct {
|
||||
u_short vendor, device;
|
||||
char *modname;
|
||||
char *name;
|
||||
} pci_id_t;
|
||||
|
||||
pci_id_t pci_id[] = {
|
||||
{ 0x1013, 0x1100, "i82365", "Cirrus Logic CL 6729" },
|
||||
{ 0x1013, 0x1110, "yenta_socket", "Cirrus Logic PD 6832" },
|
||||
{ 0x10b3, 0xb106, "yenta_socket", "SMC 34C90" },
|
||||
{ 0x1180, 0x0465, "yenta_socket", "Ricoh RL5C465" },
|
||||
{ 0x1180, 0x0466, "yenta_socket", "Ricoh RL5C466" },
|
||||
{ 0x1180, 0x0475, "yenta_socket", "Ricoh RL5C475" },
|
||||
{ 0x1180, 0x0476, "yenta_socket", "Ricoh RL5C476" },
|
||||
{ 0x1180, 0x0477, "yenta_socket", "Ricoh RL5C477" },
|
||||
{ 0x1180, 0x0478, "yenta_socket", "Ricoh RL5C478" },
|
||||
{ 0x104c, 0xac12, "yenta_socket", "Texas Instruments PCI1130" },
|
||||
{ 0x104c, 0xac13, "yenta_socket", "Texas Instruments PCI1031" },
|
||||
{ 0x104c, 0xac15, "yenta_socket", "Texas Instruments PCI1131" },
|
||||
{ 0x104c, 0xac1a, "yenta_socket", "Texas Instruments PCI1210" },
|
||||
{ 0x104c, 0xac1e, "yenta_socket", "Texas Instruments PCI1211" },
|
||||
{ 0x104c, 0xac17, "yenta_socket", "Texas Instruments PCI1220" },
|
||||
{ 0x104c, 0xac19, "yenta_socket", "Texas Instruments PCI1221" },
|
||||
{ 0x104c, 0xac1c, "yenta_socket", "Texas Instruments PCI1225" },
|
||||
{ 0x104c, 0xac16, "yenta_socket", "Texas Instruments PCI1250" },
|
||||
{ 0x104c, 0xac1d, "yenta_socket", "Texas Instruments PCI1251A" },
|
||||
{ 0x104c, 0xac1f, "yenta_socket", "Texas Instruments PCI1251B" },
|
||||
{ 0x104c, 0xac50, "yenta_socket", "Texas Instruments PCI1410" },
|
||||
{ 0x104c, 0xac51, "yenta_socket", "Texas Instruments PCI1420" },
|
||||
{ 0x104c, 0xac1b, "yenta_socket", "Texas Instruments PCI1450" },
|
||||
{ 0x104c, 0xac52, "yenta_socket", "Texas Instruments PCI1451" },
|
||||
{ 0x104c, 0xac56, "yenta_socket", "Texas Instruments PCI1510" },
|
||||
{ 0x104c, 0xac55, "yenta_socket", "Texas Instruments PCI1520" },
|
||||
{ 0x104c, 0xac54, "yenta_socket", "Texas Instruments PCI1620" },
|
||||
{ 0x104c, 0xac41, "yenta_socket", "Texas Instruments PCI4410" },
|
||||
{ 0x104c, 0xac40, "yenta_socket", "Texas Instruments PCI4450" },
|
||||
{ 0x104c, 0xac42, "yenta_socket", "Texas Instruments PCI4451" },
|
||||
{ 0x104c, 0xac44, "yenta_socket", "Texas Instruments PCI4510" },
|
||||
{ 0x104c, 0xac46, "yenta_socket", "Texas Instruments PCI4520" },
|
||||
{ 0x104c, 0xac49, "yenta_socket", "Texas Instruments PCI7410" },
|
||||
{ 0x104c, 0xac47, "yenta_socket", "Texas Instruments PCI7510" },
|
||||
{ 0x104c, 0xac48, "yenta_socket", "Texas Instruments PCI7610" },
|
||||
{ 0x1217, 0x6729, "i82365", "O2 Micro 6729" },
|
||||
{ 0x1217, 0x673a, "i82365", "O2 Micro 6730" },
|
||||
{ 0x1217, 0x6832, "yenta_socket", "O2 Micro 6832/6833" },
|
||||
{ 0x1217, 0x6836, "yenta_socket", "O2 Micro 6836/6860" },
|
||||
{ 0x1217, 0x6872, "yenta_socket", "O2 Micro 6812" },
|
||||
{ 0x1217, 0x6925, "yenta_socket", "O2 Micro 6922" },
|
||||
{ 0x1217, 0x6933, "yenta_socket", "O2 Micro 6933" },
|
||||
{ 0x1217, 0x6972, "yenta_socket", "O2 Micro 6912" },
|
||||
{ 0x1179, 0x0603, "i82365", "Toshiba ToPIC95-A" },
|
||||
{ 0x1179, 0x060a, "yenta_socket", "Toshiba ToPIC95-B" },
|
||||
{ 0x1179, 0x060f, "yenta_socket", "Toshiba ToPIC97" },
|
||||
{ 0x1179, 0x0617, "yenta_socket", "Toshiba ToPIC100" },
|
||||
{ 0x119b, 0x1221, "i82365", "Omega Micro 82C092G" },
|
||||
{ 0x8086, 0x1221, "i82092", "Intel 82092AA_0" },
|
||||
{ 0x8086, 0x1222, "i82092", "Intel 82092AA_1" },
|
||||
{ 0x1524, 0x1211, "yenta_socket", "ENE 1211" },
|
||||
{ 0x1524, 0x1225, "yenta_socket", "ENE 1225" },
|
||||
{ 0x1524, 0x1410, "yenta_socket", "ENE 1410" },
|
||||
{ 0x1524, 0x1420, "yenta_socket", "ENE 1420" },
|
||||
};
|
||||
#define PCI_COUNT (sizeof(pci_id)/sizeof(pci_id_t))
|
||||
|
||||
static char * pci_probe()
|
||||
{
|
||||
char s[256], *modname = NULL;
|
||||
u_int device, vendor, i;
|
||||
FILE *f;
|
||||
|
||||
if ((f = fopen("/proc/bus/pci/devices", "r")) != NULL) {
|
||||
while (fgets(s, 256, f) != NULL) {
|
||||
u_int n = strtoul(s+5, NULL, 16);
|
||||
vendor = (n >> 16); device = (n & 0xffff);
|
||||
for (i = 0; i < PCI_COUNT; i++)
|
||||
if ((vendor == pci_id[i].vendor) &&
|
||||
(device == pci_id[i].device)) break;
|
||||
|
||||
if (i < PCI_COUNT) {
|
||||
modname = pci_id[i].modname;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return modname;
|
||||
}
|
||||
|
||||
/*====================================================================*/
|
||||
|
||||
#ifndef __alpha__
|
||||
typedef u_short ioaddr_t;
|
||||
|
||||
static ioaddr_t i365_base = 0x03e0;
|
||||
|
||||
static u_char i365_get(u_short sock, u_short reg)
|
||||
{
|
||||
u_char val = I365_REG(sock, reg);
|
||||
outb(val, i365_base); val = inb(i365_base+1);
|
||||
return val;
|
||||
}
|
||||
|
||||
static void i365_set(u_short sock, u_short reg, u_char data)
|
||||
{
|
||||
u_char val = I365_REG(sock, reg);
|
||||
outb(val, i365_base); outb(data, i365_base+1);
|
||||
}
|
||||
|
||||
static void i365_bset(u_short sock, u_short reg, u_char mask)
|
||||
{
|
||||
u_char d = i365_get(sock, reg);
|
||||
d |= mask;
|
||||
i365_set(sock, reg, d);
|
||||
}
|
||||
|
||||
static void i365_bclr(u_short sock, u_short reg, u_char mask)
|
||||
{
|
||||
u_char d = i365_get(sock, reg);
|
||||
d &= ~mask;
|
||||
i365_set(sock, reg, d);
|
||||
}
|
||||
|
||||
int i365_probe()
|
||||
{
|
||||
int val, slot, sock, done;
|
||||
char *name = "i82365sl";
|
||||
|
||||
ioperm(i365_base, 4, 1);
|
||||
ioperm(0x80, 1, 1);
|
||||
for (slot = 0; slot < 2; slot++) {
|
||||
for (sock = done = 0; sock < 2; sock++) {
|
||||
val = i365_get(sock, I365_IDENT);
|
||||
switch (val) {
|
||||
case 0x82:
|
||||
name = "i82365sl A step";
|
||||
break;
|
||||
case 0x83:
|
||||
name = "i82365sl B step";
|
||||
break;
|
||||
case 0x84:
|
||||
name = "VLSI 82C146";
|
||||
break;
|
||||
case 0x88: case 0x89: case 0x8a:
|
||||
name = "IBM Clone";
|
||||
break;
|
||||
case 0x8b: case 0x8c:
|
||||
break;
|
||||
default:
|
||||
done = 1;
|
||||
}
|
||||
if (done) break;
|
||||
}
|
||||
if (done && sock) break;
|
||||
i365_base += 2;
|
||||
}
|
||||
|
||||
if (sock == 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if ((sock == 2) && (strcmp(name, "VLSI 82C146") == 0))
|
||||
name = "i82365sl DF";
|
||||
|
||||
/* Check for Vadem chips */
|
||||
outb(0x0e, i365_base);
|
||||
outb(0x37, i365_base);
|
||||
i365_bset(0, VG468_MISC, VG468_MISC_VADEMREV);
|
||||
val = i365_get(0, I365_IDENT);
|
||||
if (val & I365_IDENT_VADEM) {
|
||||
if ((val & 7) < 4)
|
||||
name = "Vadem VG-468";
|
||||
else
|
||||
name = "Vadem VG-469";
|
||||
i365_bclr(0, VG468_MISC, VG468_MISC_VADEMREV);
|
||||
}
|
||||
|
||||
/* Check for Cirrus CL-PD67xx chips */
|
||||
i365_set(0, PD67_CHIP_INFO, 0);
|
||||
val = i365_get(0, PD67_CHIP_INFO);
|
||||
if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) {
|
||||
val = i365_get(0, PD67_CHIP_INFO);
|
||||
if ((val & PD67_INFO_CHIP_ID) == 0) {
|
||||
if (val & PD67_INFO_SLOTS)
|
||||
name = "Cirrus CL-PD672x";
|
||||
else {
|
||||
name = "Cirrus CL-PD6710";
|
||||
sock = 1;
|
||||
}
|
||||
i365_set(0, PD67_EXT_INDEX, 0xe5);
|
||||
if (i365_get(0, PD67_EXT_INDEX) != 0xe5)
|
||||
name = "VIA VT83C469";
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
} /* i365_probe */
|
||||
#endif
|
||||
|
||||
/*====================================================================*/
|
||||
|
||||
#ifndef __alpha__
|
||||
static u_short tcic_getw(ioaddr_t base, u_char reg)
|
||||
{
|
||||
u_short val = inw(base+reg);
|
||||
return val;
|
||||
}
|
||||
|
||||
static void tcic_setw(ioaddr_t base, u_char reg, u_short data)
|
||||
{
|
||||
outw(data, base+reg);
|
||||
}
|
||||
|
||||
int tcic_probe_at(ioaddr_t base)
|
||||
{
|
||||
int i;
|
||||
u_short old;
|
||||
|
||||
/* Anything there?? */
|
||||
for (i = 0; i < 0x10; i += 2)
|
||||
if (tcic_getw(base, i) == 0xffff)
|
||||
return -1;
|
||||
|
||||
/* Try to reset the chip */
|
||||
tcic_setw(base, TCIC_SCTRL, TCIC_SCTRL_RESET);
|
||||
tcic_setw(base, TCIC_SCTRL, 0);
|
||||
|
||||
/* Can we set the addr register? */
|
||||
old = tcic_getw(base, TCIC_ADDR);
|
||||
tcic_setw(base, TCIC_ADDR, 0);
|
||||
if (tcic_getw(base, TCIC_ADDR) != 0) {
|
||||
tcic_setw(base, TCIC_ADDR, old);
|
||||
return -2;
|
||||
}
|
||||
|
||||
tcic_setw(base, TCIC_ADDR, 0xc3a5);
|
||||
if (tcic_getw(base, TCIC_ADDR) != 0xc3a5)
|
||||
return -3;
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
int tcic_probe(ioaddr_t base)
|
||||
{
|
||||
int sock;
|
||||
|
||||
ioperm(base, 16, 1);
|
||||
ioperm(0x80, 1, 1);
|
||||
sock = tcic_probe_at(base);
|
||||
|
||||
if (sock <= 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
} /* tcic_probe */
|
||||
#endif
|
||||
|
||||
/*====================================================================*/
|
||||
|
||||
char * initialize_pcmcia (void)
|
||||
{
|
||||
#ifndef __alpha__
|
||||
ioaddr_t tcic_base = TCIC_BASE;
|
||||
#endif
|
||||
int len;
|
||||
char *pcmcia = NULL;
|
||||
|
||||
if ((pcmcia = pci_probe())) {
|
||||
/* we're all done */
|
||||
#ifndef __alpha__
|
||||
} else if (i365_probe() == 0) {
|
||||
len = strlen("i82365") + 1;
|
||||
pcmcia = calloc(1, len);
|
||||
strncpy(pcmcia, "i82365", len);
|
||||
} else if (tcic_probe(tcic_base) == 0) {
|
||||
len = strlen("tcic") + 1;
|
||||
pcmcia = calloc(1, len);
|
||||
strncpy(pcmcia, "tcic", len);
|
||||
#endif
|
||||
} else {
|
||||
/* Detect ISAPNP based i82365 controllers */
|
||||
FILE *f;
|
||||
mysystem("modprobe i82365");
|
||||
if ((f = fopen("/proc/bus/pccard/00/info", "r"))) {
|
||||
len = strlen("i82365") + 1;
|
||||
pcmcia = calloc(1, len);
|
||||
strncpy(pcmcia, "i82365", len);
|
||||
fclose(f);
|
||||
}
|
||||
}
|
||||
|
||||
return pcmcia;
|
||||
}
|
||||
@@ -1,614 +0,0 @@
|
||||
/*
|
||||
* PCMCIA bridge device probe
|
||||
*
|
||||
* This file is part of the IPCop Firewall.
|
||||
*
|
||||
* IPCop is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* IPCop is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with IPCop; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* The initial developer of the original code is David A. Hinds
|
||||
* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
|
||||
* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
|
||||
*
|
||||
* $Id: pcmcia.h,v 1.1 2004/01/25 09:34:59 riddles Exp $
|
||||
*
|
||||
*/
|
||||
|
||||
#define TCIC_BASE 0x240
|
||||
|
||||
/* offsets of registers from TCIC_BASE */
|
||||
#define TCIC_DATA 0x00
|
||||
#define TCIC_ADDR 0x02
|
||||
#define TCIC_SCTRL 0x06
|
||||
#define TCIC_SSTAT 0x07
|
||||
#define TCIC_MODE 0x08
|
||||
#define TCIC_PWR 0x09
|
||||
#define TCIC_EDC 0x0A
|
||||
#define TCIC_ICSR 0x0C
|
||||
#define TCIC_IENA 0x0D
|
||||
#define TCIC_AUX 0x0E
|
||||
|
||||
#define TCIC_SS_SHFT 12
|
||||
#define TCIC_SS_MASK 0x7000
|
||||
|
||||
/* Flags for TCIC_ADDR */
|
||||
#define TCIC_ADR2_REG 0x8000
|
||||
#define TCIC_ADR2_INDREG 0x0800
|
||||
|
||||
#define TCIC_ADDR_REG 0x80000000
|
||||
#define TCIC_ADDR_SS_SHFT (TCIC_SS_SHFT+16)
|
||||
#define TCIC_ADDR_SS_MASK (TCIC_SS_MASK<<16)
|
||||
#define TCIC_ADDR_INDREG 0x08000000
|
||||
#define TCIC_ADDR_IO 0x04000000
|
||||
#define TCIC_ADDR_MASK 0x03ffffff
|
||||
|
||||
/* Flags for TCIC_SCTRL */
|
||||
#define TCIC_SCTRL_ENA 0x01
|
||||
#define TCIC_SCTRL_INCMODE 0x18
|
||||
#define TCIC_SCTRL_INCMODE_HOLD 0x00
|
||||
#define TCIC_SCTRL_INCMODE_WORD 0x08
|
||||
#define TCIC_SCTRL_INCMODE_REG 0x10
|
||||
#define TCIC_SCTRL_INCMODE_AUTO 0x18
|
||||
#define TCIC_SCTRL_EDCSUM 0x20
|
||||
#define TCIC_SCTRL_RESET 0x80
|
||||
|
||||
/* Flags for TCIC_SSTAT */
|
||||
#define TCIC_SSTAT_6US 0x01
|
||||
#define TCIC_SSTAT_10US 0x02
|
||||
#define TCIC_SSTAT_PROGTIME 0x04
|
||||
#define TCIC_SSTAT_LBAT1 0x08
|
||||
#define TCIC_SSTAT_LBAT2 0x10
|
||||
#define TCIC_SSTAT_RDY 0x20 /* Inverted */
|
||||
#define TCIC_SSTAT_WP 0x40
|
||||
#define TCIC_SSTAT_CD 0x80 /* Card detect */
|
||||
|
||||
/* Flags for TCIC_MODE */
|
||||
#define TCIC_MODE_PGMMASK 0x1f
|
||||
#define TCIC_MODE_NORMAL 0x00
|
||||
#define TCIC_MODE_PGMWR 0x01
|
||||
#define TCIC_MODE_PGMRD 0x02
|
||||
#define TCIC_MODE_PGMCE 0x04
|
||||
#define TCIC_MODE_PGMDBW 0x08
|
||||
#define TCIC_MODE_PGMWORD 0x10
|
||||
#define TCIC_MODE_AUXSEL_MASK 0xe0
|
||||
|
||||
/* Registers accessed through TCIC_AUX, by setting TCIC_MODE */
|
||||
#define TCIC_AUX_TCTL (0<<5)
|
||||
#define TCIC_AUX_PCTL (1<<5)
|
||||
#define TCIC_AUX_WCTL (2<<5)
|
||||
#define TCIC_AUX_EXTERN (3<<5)
|
||||
#define TCIC_AUX_PDATA (4<<5)
|
||||
#define TCIC_AUX_SYSCFG (5<<5)
|
||||
#define TCIC_AUX_ILOCK (6<<5)
|
||||
#define TCIC_AUX_TEST (7<<5)
|
||||
|
||||
/* Flags for TCIC_PWR */
|
||||
#define TCIC_PWR_VCC(sock) (0x01<<(sock))
|
||||
#define TCIC_PWR_VCC_MASK 0x03
|
||||
#define TCIC_PWR_VPP(sock) (0x08<<(sock))
|
||||
#define TCIC_PWR_VPP_MASK 0x18
|
||||
#define TCIC_PWR_CLIMENA 0x40
|
||||
#define TCIC_PWR_CLIMSTAT 0x80
|
||||
|
||||
/* Flags for TCIC_ICSR */
|
||||
#define TCIC_ICSR_CLEAR 0x01
|
||||
#define TCIC_ICSR_SET 0x02
|
||||
#define TCIC_ICSR_JAM (TCIC_ICSR_CLEAR|TCIC_ICSR_SET)
|
||||
#define TCIC_ICSR_STOPCPU 0x04
|
||||
#define TCIC_ICSR_ILOCK 0x08
|
||||
#define TCIC_ICSR_PROGTIME 0x10
|
||||
#define TCIC_ICSR_ERR 0x20
|
||||
#define TCIC_ICSR_CDCHG 0x40
|
||||
#define TCIC_ICSR_IOCHK 0x80
|
||||
|
||||
/* Flags for TCIC_IENA */
|
||||
#define TCIC_IENA_CFG_MASK 0x03
|
||||
#define TCIC_IENA_CFG_OFF 0x00 /* disabled */
|
||||
#define TCIC_IENA_CFG_OD 0x01 /* active low, open drain */
|
||||
#define TCIC_IENA_CFG_LOW 0x02 /* active low, totem pole */
|
||||
#define TCIC_IENA_CFG_HIGH 0x03 /* active high, totem pole */
|
||||
#define TCIC_IENA_ILOCK 0x08
|
||||
#define TCIC_IENA_PROGTIME 0x10
|
||||
#define TCIC_IENA_ERR 0x20 /* overcurrent or iochk */
|
||||
#define TCIC_IENA_CDCHG 0x40
|
||||
|
||||
/* Flags for TCIC_AUX_WCTL */
|
||||
#define TCIC_WAIT_COUNT_MASK 0x001f
|
||||
#define TCIC_WAIT_ASYNC 0x0020
|
||||
#define TCIC_WAIT_SENSE 0x0040
|
||||
#define TCIC_WAIT_SRC 0x0080
|
||||
#define TCIC_WCTL_WR 0x0100
|
||||
#define TCIC_WCTL_RD 0x0200
|
||||
#define TCIC_WCTL_CE 0x0400
|
||||
#define TCIC_WCTL_LLBAT1 0x0800
|
||||
#define TCIC_WCTL_LLBAT2 0x1000
|
||||
#define TCIC_WCTL_LRDY 0x2000
|
||||
#define TCIC_WCTL_LWP 0x4000
|
||||
#define TCIC_WCTL_LCD 0x8000
|
||||
|
||||
/* Flags for TCIC_AUX_SYSCFG */
|
||||
#define TCIC_SYSCFG_IRQ_MASK 0x000f
|
||||
#define TCIC_SYSCFG_MCSFULL 0x0010
|
||||
#define TCIC_SYSCFG_IO1723 0x0020
|
||||
#define TCIC_SYSCFG_MCSXB 0x0040
|
||||
#define TCIC_SYSCFG_ICSXB 0x0080
|
||||
#define TCIC_SYSCFG_NOPDN 0x0100
|
||||
#define TCIC_SYSCFG_MPSEL_SHFT 9
|
||||
#define TCIC_SYSCFG_MPSEL_MASK 0x0e00
|
||||
#define TCIC_SYSCFG_MPSENSE 0x2000
|
||||
#define TCIC_SYSCFG_AUTOBUSY 0x4000
|
||||
#define TCIC_SYSCFG_ACC 0x8000
|
||||
|
||||
#define TCIC_ILOCK_OUT 0x01
|
||||
#define TCIC_ILOCK_SENSE 0x02
|
||||
#define TCIC_ILOCK_CRESET 0x04
|
||||
#define TCIC_ILOCK_CRESENA 0x08
|
||||
#define TCIC_ILOCK_CWAIT 0x10
|
||||
#define TCIC_ILOCK_CWAITSNS 0x20
|
||||
#define TCIC_ILOCK_HOLD_MASK 0xc0
|
||||
#define TCIC_ILOCK_HOLD_CCLK 0xc0
|
||||
|
||||
#define TCIC_ILOCKTEST_ID_SH 8
|
||||
#define TCIC_ILOCKTEST_ID_MASK 0x7f00
|
||||
#define TCIC_ILOCKTEST_MCIC_1 0x8000
|
||||
|
||||
#define TCIC_ID_DB86082 0x02
|
||||
#define TCIC_ID_DB86082A 0x03
|
||||
#define TCIC_ID_DB86084 0x04
|
||||
#define TCIC_ID_DB86084A 0x08
|
||||
#define TCIC_ID_DB86072 0x15
|
||||
#define TCIC_ID_DB86184 0x14
|
||||
#define TCIC_ID_DB86082B 0x17
|
||||
|
||||
#define TCIC_TEST_DIAG 0x8000
|
||||
|
||||
/*
|
||||
* Indirectly addressed registers
|
||||
*/
|
||||
|
||||
#define TCIC_SCF1(sock) ((sock)<<3)
|
||||
#define TCIC_SCF2(sock) (((sock)<<3)+2)
|
||||
|
||||
/* Flags for SCF1 */
|
||||
#define TCIC_SCF1_IRQ_MASK 0x000f
|
||||
#define TCIC_SCF1_IRQ_OFF 0x0000
|
||||
#define TCIC_SCF1_IRQOC 0x0010
|
||||
#define TCIC_SCF1_PCVT 0x0020
|
||||
#define TCIC_SCF1_IRDY 0x0040
|
||||
#define TCIC_SCF1_ATA 0x0080
|
||||
#define TCIC_SCF1_DMA_SHIFT 8
|
||||
#define TCIC_SCF1_DMA_MASK 0x0700
|
||||
#define TCIC_SCF1_DMA_OFF 0
|
||||
#define TCIC_SCF1_DREQ2 2
|
||||
#define TCIC_SCF1_IOSTS 0x0800
|
||||
#define TCIC_SCF1_SPKR 0x1000
|
||||
#define TCIC_SCF1_FINPACK 0x2000
|
||||
#define TCIC_SCF1_DELWR 0x4000
|
||||
#define TCIC_SCF1_HD7IDE 0x8000
|
||||
|
||||
/* Flags for SCF2 */
|
||||
#define TCIC_SCF2_RI 0x0001
|
||||
#define TCIC_SCF2_IDBR 0x0002
|
||||
#define TCIC_SCF2_MDBR 0x0004
|
||||
#define TCIC_SCF2_MLBAT1 0x0008
|
||||
#define TCIC_SCF2_MLBAT2 0x0010
|
||||
#define TCIC_SCF2_MRDY 0x0020
|
||||
#define TCIC_SCF2_MWP 0x0040
|
||||
#define TCIC_SCF2_MCD 0x0080
|
||||
#define TCIC_SCF2_MALL 0x00f8
|
||||
|
||||
/* Indirect addresses for memory window registers */
|
||||
#define TCIC_MWIN(sock,map) (0x100+(((map)+((sock)<<2))<<3))
|
||||
#define TCIC_MBASE_X 2
|
||||
#define TCIC_MMAP_X 4
|
||||
#define TCIC_MCTL_X 6
|
||||
|
||||
#define TCIC_MBASE_4K_BIT 0x4000
|
||||
#define TCIC_MBASE_HA_SHFT 12
|
||||
#define TCIC_MBASE_HA_MASK 0x0fff
|
||||
|
||||
#define TCIC_MMAP_REG 0x8000
|
||||
#define TCIC_MMAP_CA_SHFT 12
|
||||
#define TCIC_MMAP_CA_MASK 0x3fff
|
||||
|
||||
#define TCIC_MCTL_WSCNT_MASK 0x001f
|
||||
#define TCIC_MCTL_WCLK 0x0020
|
||||
#define TCIC_MCTL_WCLK_CCLK 0x0000
|
||||
#define TCIC_MCTL_WCLK_BCLK 0x0020
|
||||
#define TCIC_MCTL_QUIET 0x0040
|
||||
#define TCIC_MCTL_WP 0x0080
|
||||
#define TCIC_MCTL_ACC 0x0100
|
||||
#define TCIC_MCTL_KE 0x0200
|
||||
#define TCIC_MCTL_EDC 0x0400
|
||||
#define TCIC_MCTL_B8 0x0800
|
||||
#define TCIC_MCTL_SS_SHFT TCIC_SS_SHFT
|
||||
#define TCIC_MCTL_SS_MASK TCIC_SS_MASK
|
||||
#define TCIC_MCTL_ENA 0x8000
|
||||
|
||||
/* Indirect addresses for I/O window registers */
|
||||
#define TCIC_IWIN(sock,map) (0x200+(((map)+((sock)<<1))<<2))
|
||||
#define TCIC_IBASE_X 0
|
||||
#define TCIC_ICTL_X 2
|
||||
|
||||
#define TCIC_ICTL_WSCNT_MASK TCIC_MCTL_WSCNT_MASK
|
||||
#define TCIC_ICTL_QUIET TCIC_MCTL_QUIET
|
||||
#define TCIC_ICTL_1K 0x0080
|
||||
#define TCIC_ICTL_PASS16 0x0100
|
||||
#define TCIC_ICTL_ACC TCIC_MCTL_ACC
|
||||
#define TCIC_ICTL_TINY 0x0200
|
||||
#define TCIC_ICTL_B16 0x0400
|
||||
#define TCIC_ICTL_B8 TCIC_MCTL_B8
|
||||
#define TCIC_ICTL_BW_MASK (TCIC_ICTL_B16|TCIC_ICTL_B8)
|
||||
#define TCIC_ICTL_BW_DYN 0
|
||||
#define TCIC_ICTL_BW_8 TCIC_ICTL_B8
|
||||
#define TCIC_ICTL_BW_16 TCIC_ICTL_B16
|
||||
#define TCIC_ICTL_BW_ATA (TCIC_ICTL_B16|TCIC_ICTL_B8)
|
||||
#define TCIC_ICTL_SS_SHFT TCIC_SS_SHFT
|
||||
#define TCIC_ICTL_SS_MASK TCIC_SS_MASK
|
||||
#define TCIC_ICTL_ENA TCIC_MCTL_ENA
|
||||
|
||||
/* register definitions for the Intel 82365SL PCMCIA controller */
|
||||
|
||||
/* Offsets for PCIC registers */
|
||||
#define I365_IDENT 0x00 /* Identification and revision */
|
||||
#define I365_STATUS 0x01 /* Interface status */
|
||||
#define I365_POWER 0x02 /* Power and RESETDRV control */
|
||||
#define I365_INTCTL 0x03 /* Interrupt and general control */
|
||||
#define I365_CSC 0x04 /* Card status change */
|
||||
#define I365_CSCINT 0x05 /* Card status change interrupt control */
|
||||
#define I365_ADDRWIN 0x06 /* Address window enable */
|
||||
#define I365_IOCTL 0x07 /* I/O control */
|
||||
#define I365_GENCTL 0x16 /* Card detect and general control */
|
||||
#define I365_GBLCTL 0x1E /* Global control register */
|
||||
|
||||
/* Offsets for I/O and memory window registers */
|
||||
#define I365_IO(map) (0x08+((map)<<2))
|
||||
#define I365_MEM(map) (0x10+((map)<<3))
|
||||
#define I365_W_START 0
|
||||
#define I365_W_STOP 2
|
||||
#define I365_W_OFF 4
|
||||
|
||||
/* Flags for I365_STATUS */
|
||||
#define I365_CS_BVD1 0x01
|
||||
#define I365_CS_STSCHG 0x01
|
||||
#define I365_CS_BVD2 0x02
|
||||
#define I365_CS_SPKR 0x02
|
||||
#define I365_CS_DETECT 0x0C
|
||||
#define I365_CS_WRPROT 0x10
|
||||
#define I365_CS_READY 0x20 /* Inverted */
|
||||
#define I365_CS_POWERON 0x40
|
||||
#define I365_CS_GPI 0x80
|
||||
|
||||
/* Flags for I365_POWER */
|
||||
#define I365_PWR_OFF 0x00 /* Turn off the socket */
|
||||
#define I365_PWR_OUT 0x80 /* Output enable */
|
||||
#define I365_PWR_NORESET 0x40 /* Disable RESETDRV on resume */
|
||||
#define I365_PWR_AUTO 0x20 /* Auto pwr switch enable */
|
||||
#define I365_VCC_MASK 0x18 /* Mask for turning off Vcc */
|
||||
/* There are different layouts for B-step and DF-step chips: the B
|
||||
step has independent Vpp1/Vpp2 control, and the DF step has only
|
||||
Vpp1 control, plus 3V control */
|
||||
#define I365_VCC_5V 0x10 /* Vcc = 5.0v */
|
||||
#define I365_VCC_3V 0x18 /* Vcc = 3.3v */
|
||||
#define I365_VPP2_MASK 0x0c /* Mask for turning off Vpp2 */
|
||||
#define I365_VPP2_5V 0x04 /* Vpp2 = 5.0v */
|
||||
#define I365_VPP2_12V 0x08 /* Vpp2 = 12.0v */
|
||||
#define I365_VPP1_MASK 0x03 /* Mask for turning off Vpp1 */
|
||||
#define I365_VPP1_5V 0x01 /* Vpp2 = 5.0v */
|
||||
#define I365_VPP1_12V 0x02 /* Vpp2 = 12.0v */
|
||||
|
||||
/* Flags for I365_INTCTL */
|
||||
#define I365_RING_ENA 0x80
|
||||
#define I365_PC_RESET 0x40
|
||||
#define I365_PC_IOCARD 0x20
|
||||
#define I365_INTR_ENA 0x10
|
||||
#define I365_IRQ_MASK 0x0F
|
||||
|
||||
/* Flags for I365_CSC and I365_CSCINT*/
|
||||
#define I365_CSC_BVD1 0x01
|
||||
#define I365_CSC_STSCHG 0x01
|
||||
#define I365_CSC_BVD2 0x02
|
||||
#define I365_CSC_READY 0x04
|
||||
#define I365_CSC_DETECT 0x08
|
||||
#define I365_CSC_ANY 0x0F
|
||||
#define I365_CSC_GPI 0x10
|
||||
|
||||
/* Flags for I365_ADDRWIN */
|
||||
#define I365_ADDR_MEMCS16 0x20
|
||||
#define I365_ENA_IO(map) (0x40 << (map))
|
||||
#define I365_ENA_MEM(map) (0x01 << (map))
|
||||
|
||||
/* Flags for I365_IOCTL */
|
||||
#define I365_IOCTL_MASK(map) (0x0F << (map<<2))
|
||||
#define I365_IOCTL_WAIT(map) (0x08 << (map<<2))
|
||||
#define I365_IOCTL_0WS(map) (0x04 << (map<<2))
|
||||
#define I365_IOCTL_IOCS16(map) (0x02 << (map<<2))
|
||||
#define I365_IOCTL_16BIT(map) (0x01 << (map<<2))
|
||||
|
||||
/* Flags for I365_GENCTL */
|
||||
#define I365_CTL_16DELAY 0x01
|
||||
#define I365_CTL_RESET 0x02
|
||||
#define I365_CTL_GPI_ENA 0x04
|
||||
#define I365_CTL_GPI_CTL 0x08
|
||||
#define I365_CTL_RESUME 0x10
|
||||
#define I365_CTL_SW_IRQ 0x20
|
||||
|
||||
/* Flags for I365_GBLCTL */
|
||||
#define I365_GBL_PWRDOWN 0x01
|
||||
#define I365_GBL_CSC_LEV 0x02
|
||||
#define I365_GBL_WRBACK 0x04
|
||||
#define I365_GBL_IRQ_0_LEV 0x08
|
||||
#define I365_GBL_IRQ_1_LEV 0x10
|
||||
|
||||
/* Flags for memory window registers */
|
||||
#define I365_MEM_16BIT 0x8000 /* In memory start high byte */
|
||||
#define I365_MEM_0WS 0x4000
|
||||
#define I365_MEM_WS1 0x8000 /* In memory stop high byte */
|
||||
#define I365_MEM_WS0 0x4000
|
||||
#define I365_MEM_WRPROT 0x8000 /* In offset high byte */
|
||||
#define I365_MEM_REG 0x4000
|
||||
|
||||
#define I365_REG(slot, reg) (((slot) << 6) | (reg))
|
||||
|
||||
/* Default ISA interrupt mask */
|
||||
#define I365_ISA_IRQ_MASK 0xdeb8 /* irq's 3-5,7,9-12,14,15 */
|
||||
|
||||
/* Device ID's for PCI-to-PCMCIA bridges */
|
||||
|
||||
#ifndef PCI_VENDOR_ID_INTEL
|
||||
#define PCI_VENDOR_ID_INTEL 0x8086
|
||||
#endif
|
||||
#ifndef PCI_DEVICE_ID_INTEL_82092AA_0
|
||||
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
|
||||
#endif
|
||||
#ifndef PCI_VENDOR_ID_OMEGA
|
||||
#define PCI_VENDOR_ID_OMEGA 0x119b
|
||||
#endif
|
||||
#ifndef PCI_DEVICE_ID_OMEGA_82C092G
|
||||
#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
|
||||
#endif
|
||||
|
||||
#ifndef PCI_VENDOR_ID_CIRRUS
|
||||
#define PCI_VENDOR_ID_CIRRUS 0x1013
|
||||
#endif
|
||||
#ifndef PCI_DEVICE_ID_CIRRUS_6729
|
||||
#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
|
||||
#endif
|
||||
#ifndef PCI_DEVICE_ID_CIRRUS_6832
|
||||
#define PCI_DEVICE_ID_CIRRUS_6832 0x1110
|
||||
#endif
|
||||
|
||||
#define PD67_MISC_CTL_1 0x16 /* Misc control 1 */
|
||||
#define PD67_FIFO_CTL 0x17 /* FIFO control */
|
||||
#define PD67_MISC_CTL_2 0x1E /* Misc control 2 */
|
||||
#define PD67_CHIP_INFO 0x1f /* Chip information */
|
||||
#define PD67_ATA_CTL 0x026 /* 6730: ATA control */
|
||||
#define PD67_EXT_INDEX 0x2e /* Extension index */
|
||||
#define PD67_EXT_DATA 0x2f /* Extension data */
|
||||
|
||||
#define pd67_ext_get(s, r) \
|
||||
(i365_set(s, PD67_EXT_INDEX, r), i365_get(s, PD67_EXT_DATA))
|
||||
#define pd67_ext_set(s, r, v) \
|
||||
(i365_set(s, PD67_EXT_INDEX, r), i365_set(s, PD67_EXT_DATA, v))
|
||||
|
||||
/* PD6722 extension registers -- indexed in PD67_EXT_INDEX */
|
||||
#define PD67_DATA_MASK0 0x01 /* Data mask 0 */
|
||||
#define PD67_DATA_MASK1 0x02 /* Data mask 1 */
|
||||
#define PD67_DMA_CTL 0x03 /* DMA control */
|
||||
|
||||
/* PD6730 extension registers -- indexed in PD67_EXT_INDEX */
|
||||
#define PD67_EXT_CTL_1 0x03 /* Extension control 1 */
|
||||
#define PD67_MEM_PAGE(n) ((n)+5) /* PCI window bits 31:24 */
|
||||
#define PD67_EXTERN_DATA 0x0a
|
||||
#define PD67_EXT_CTL_2 0x0b
|
||||
#define PD67_MISC_CTL_3 0x25
|
||||
#define PD67_SMB_PWR_CTL 0x26
|
||||
|
||||
/* I/O window address offset */
|
||||
#define PD67_IO_OFF(w) (0x36+((w)<<1))
|
||||
|
||||
/* Timing register sets */
|
||||
#define PD67_TIME_SETUP(n) (0x3a + 3*(n))
|
||||
#define PD67_TIME_CMD(n) (0x3b + 3*(n))
|
||||
#define PD67_TIME_RECOV(n) (0x3c + 3*(n))
|
||||
|
||||
/* Flags for PD67_MISC_CTL_1 */
|
||||
#define PD67_MC1_5V_DET 0x01 /* 5v detect */
|
||||
#define PD67_MC1_MEDIA_ENA 0x01 /* 6730: Multimedia enable */
|
||||
#define PD67_MC1_VCC_3V 0x02 /* 3.3v Vcc */
|
||||
#define PD67_MC1_PULSE_MGMT 0x04
|
||||
#define PD67_MC1_PULSE_IRQ 0x08
|
||||
#define PD67_MC1_SPKR_ENA 0x10
|
||||
#define PD67_MC1_INPACK_ENA 0x80
|
||||
|
||||
/* Flags for PD67_FIFO_CTL */
|
||||
#define PD67_FIFO_EMPTY 0x80
|
||||
|
||||
/* Flags for PD67_MISC_CTL_2 */
|
||||
#define PD67_MC2_FREQ_BYPASS 0x01
|
||||
#define PD67_MC2_DYNAMIC_MODE 0x02
|
||||
#define PD67_MC2_SUSPEND 0x04
|
||||
#define PD67_MC2_5V_CORE 0x08
|
||||
#define PD67_MC2_LED_ENA 0x10 /* IRQ 12 is LED enable */
|
||||
#define PD67_MC2_FAST_PCI 0x10 /* 6729: PCI bus > 25 MHz */
|
||||
#define PD67_MC2_3STATE_BIT7 0x20 /* Floppy change bit */
|
||||
#define PD67_MC2_DMA_MODE 0x40
|
||||
#define PD67_MC2_IRQ15_RI 0x80 /* IRQ 15 is ring enable */
|
||||
|
||||
/* Flags for PD67_CHIP_INFO */
|
||||
#define PD67_INFO_SLOTS 0x20 /* 0 = 1 slot, 1 = 2 slots */
|
||||
#define PD67_INFO_CHIP_ID 0xc0
|
||||
#define PD67_INFO_REV 0x1c
|
||||
|
||||
/* Fields in PD67_TIME_* registers */
|
||||
#define PD67_TIME_SCALE 0xc0
|
||||
#define PD67_TIME_SCALE_1 0x00
|
||||
#define PD67_TIME_SCALE_16 0x40
|
||||
#define PD67_TIME_SCALE_256 0x80
|
||||
#define PD67_TIME_SCALE_4096 0xc0
|
||||
#define PD67_TIME_MULT 0x3f
|
||||
|
||||
/* Fields in PD67_DMA_CTL */
|
||||
#define PD67_DMA_MODE 0xc0
|
||||
#define PD67_DMA_OFF 0x00
|
||||
#define PD67_DMA_DREQ_INPACK 0x40
|
||||
#define PD67_DMA_DREQ_WP 0x80
|
||||
#define PD67_DMA_DREQ_BVD2 0xc0
|
||||
#define PD67_DMA_PULLUP 0x20 /* Disable socket pullups? */
|
||||
|
||||
/* Fields in PD67_EXT_CTL_1 */
|
||||
#define PD67_EC1_VCC_PWR_LOCK 0x01
|
||||
#define PD67_EC1_AUTO_PWR_CLEAR 0x02
|
||||
#define PD67_EC1_LED_ENA 0x04
|
||||
#define PD67_EC1_INV_CARD_IRQ 0x08
|
||||
#define PD67_EC1_INV_MGMT_IRQ 0x10
|
||||
#define PD67_EC1_PULLUP_CTL 0x20
|
||||
|
||||
/* Fields in PD67_EXTERN_DATA */
|
||||
#define PD67_EXD_VS1(s) (0x01 << ((s)<<1))
|
||||
#define PD67_EXD_VS2(s) (0x02 << ((s)<<1))
|
||||
|
||||
/* Fields in PD67_EXT_CTL_2 */
|
||||
#define PD67_EC2_GPSTB_TOTEM 0x04
|
||||
#define PD67_EC2_GPSTB_IOR 0x08
|
||||
#define PD67_EC2_GPSTB_IOW 0x10
|
||||
#define PD67_EC2_GPSTB_HIGH 0x20
|
||||
|
||||
/* Fields in PD67_MISC_CTL_3 */
|
||||
#define PD67_MC3_IRQ_MASK 0x03
|
||||
#define PD67_MC3_IRQ_PCPCI 0x00
|
||||
#define PD67_MC3_IRQ_EXTERN 0x01
|
||||
#define PD67_MC3_IRQ_PCIWAY 0x02
|
||||
#define PD67_MC3_IRQ_PCI 0x03
|
||||
#define PD67_MC3_PWR_MASK 0x0c
|
||||
#define PD67_MC3_PWR_SERIAL 0x00
|
||||
#define PD67_MC3_PWR_TI2202 0x08
|
||||
#define PD67_MC3_PWR_SMB 0x0c
|
||||
|
||||
/* Register definitions for Cirrus PD6832 PCI-to-CardBus bridge */
|
||||
|
||||
/* PD6832 extension registers -- indexed in PD67_EXT_INDEX */
|
||||
#define PD68_PCI_SPACE 0x22
|
||||
#define PD68_PCCARD_SPACE 0x23
|
||||
#define PD68_WINDOW_TYPE 0x24
|
||||
#define PD68_EXT_CSC 0x2e
|
||||
#define PD68_MISC_CTL_4 0x2f
|
||||
#define PD68_MISC_CTL_5 0x30
|
||||
#define PD68_MISC_CTL_6 0x31
|
||||
|
||||
/* Extra flags in PD67_MISC_CTL_3 */
|
||||
#define PD68_MC3_HW_SUSP 0x10
|
||||
#define PD68_MC3_MM_EXPAND 0x40
|
||||
#define PD68_MC3_MM_ARM 0x80
|
||||
|
||||
/* Bridge Control Register */
|
||||
#define PD6832_BCR_MGMT_IRQ_ENA 0x0800
|
||||
|
||||
/* Socket Number Register */
|
||||
#define PD6832_SOCKET_NUMBER 0x004c /* 8 bit */
|
||||
|
||||
/* Data structure for tracking vendor-specific state */
|
||||
typedef struct cirrus_state_t {
|
||||
u_char misc1; /* PD67_MISC_CTL_1 */
|
||||
u_char misc2; /* PD67_MISC_CTL_2 */
|
||||
u_char ectl1; /* PD67_EXT_CTL_1 */
|
||||
u_char timer[6]; /* PD67_TIME_* */
|
||||
} cirrus_state_t;
|
||||
|
||||
#define CIRRUS_PCIC_ID \
|
||||
IS_PD6729, IS_PD6730, IS_PD6832
|
||||
|
||||
#define CIRRUS_PCIC_INFO \
|
||||
{ "Cirrus PD6729", IS_CIRRUS|IS_PCI, ID(CIRRUS, 6729) }, \
|
||||
{ "Cirrus PD6730", IS_CIRRUS|IS_PCI, PCI_VENDOR_ID_CIRRUS, -1 }, \
|
||||
{ "Cirrus PD6832", IS_CIRRUS|IS_CARDBUS, ID(CIRRUS, 6832) }
|
||||
|
||||
/* Special bit in I365_IDENT used for Vadem chip detection */
|
||||
#define I365_IDENT_VADEM 0x08
|
||||
|
||||
/* Special definitions in I365_POWER */
|
||||
#define VG468_VPP2_MASK 0x0c
|
||||
#define VG468_VPP2_5V 0x04
|
||||
#define VG468_VPP2_12V 0x08
|
||||
|
||||
/* Unique Vadem registers */
|
||||
#define VG469_VSENSE 0x1f /* Card voltage sense */
|
||||
#define VG469_VSELECT 0x2f /* Card voltage select */
|
||||
#define VG468_CTL 0x38 /* Control register */
|
||||
#define VG468_TIMER 0x39 /* Timer control */
|
||||
#define VG468_MISC 0x3a /* Miscellaneous */
|
||||
#define VG468_GPIO_CFG 0x3b /* GPIO configuration */
|
||||
#define VG469_EXT_MODE 0x3c /* Extended mode register */
|
||||
#define VG468_SELECT 0x3d /* Programmable chip select */
|
||||
#define VG468_SELECT_CFG 0x3e /* Chip select configuration */
|
||||
#define VG468_ATA 0x3f /* ATA control */
|
||||
|
||||
/* Flags for VG469_VSENSE */
|
||||
#define VG469_VSENSE_A_VS1 0x01
|
||||
#define VG469_VSENSE_A_VS2 0x02
|
||||
#define VG469_VSENSE_B_VS1 0x04
|
||||
#define VG469_VSENSE_B_VS2 0x08
|
||||
|
||||
/* Flags for VG469_VSELECT */
|
||||
#define VG469_VSEL_VCC 0x03
|
||||
#define VG469_VSEL_5V 0x00
|
||||
#define VG469_VSEL_3V 0x03
|
||||
#define VG469_VSEL_MAX 0x0c
|
||||
#define VG469_VSEL_EXT_STAT 0x10
|
||||
#define VG469_VSEL_EXT_BUS 0x20
|
||||
#define VG469_VSEL_MIXED 0x40
|
||||
#define VG469_VSEL_ISA 0x80
|
||||
|
||||
/* Flags for VG468_CTL */
|
||||
#define VG468_CTL_SLOW 0x01 /* 600ns memory timing */
|
||||
#define VG468_CTL_ASYNC 0x02 /* Asynchronous bus clocking */
|
||||
#define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
|
||||
#define VG468_CTL_DELAY 0x10 /* Card detect debounce */
|
||||
#define VG468_CTL_INPACK 0x20 /* Obey INPACK signal? */
|
||||
#define VG468_CTL_POLARITY 0x40 /* VCCEN polarity */
|
||||
#define VG468_CTL_COMPAT 0x80 /* Compatibility stuff */
|
||||
|
||||
#define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
|
||||
#define VG469_CTL_STRETCH 0x10 /* LED stretch */
|
||||
|
||||
/* Flags for VG468_TIMER */
|
||||
#define VG468_TIMER_ZEROPWR 0x10 /* Zero power control */
|
||||
#define VG468_TIMER_SIGEN 0x20 /* Power up */
|
||||
#define VG468_TIMER_STATUS 0x40 /* Activity timer status */
|
||||
#define VG468_TIMER_RES 0x80 /* Timer resolution */
|
||||
#define VG468_TIMER_MASK 0x0f /* Activity timer timeout */
|
||||
|
||||
/* Flags for VG468_MISC */
|
||||
#define VG468_MISC_GPIO 0x04 /* General-purpose IO */
|
||||
#define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
|
||||
#define VG469_MISC_LEDENA 0x10 /* LED enable */
|
||||
#define VG468_MISC_VADEMREV 0x40 /* Vadem revision control */
|
||||
#define VG468_MISC_UNLOCK 0x80 /* Unique register lock */
|
||||
|
||||
/* Flags for VG469_EXT_MODE_A */
|
||||
#define VG469_MODE_VPPST 0x03 /* Vpp steering control */
|
||||
#define VG469_MODE_INT_SENSE 0x04 /* Internal voltage sense */
|
||||
#define VG469_MODE_CABLE 0x08
|
||||
#define VG469_MODE_COMPAT 0x10 /* i82365sl B or DF step */
|
||||
#define VG469_MODE_TEST 0x20
|
||||
#define VG469_MODE_RIO 0x40 /* Steer RIO to INTR? */
|
||||
|
||||
/* Flags for VG469_EXT_MODE_B */
|
||||
#define VG469_MODE_B_3V 0x01 /* 3.3v for socket B */
|
||||
|
||||
/* Data structure for tracking vendor-specific state */
|
||||
typedef struct vg46x_state_t {
|
||||
u_char ctl; /* VG468_CTL */
|
||||
u_char ema; /* VG468_EXT_MODE_A */
|
||||
} vg46x_state_t;
|
||||
149
src/install+setup/install/unattended.c
Normal file
149
src/install+setup/install/unattended.c
Normal file
@@ -0,0 +1,149 @@
|
||||
/*
|
||||
* This file is part of the IPFire Firewall.
|
||||
*
|
||||
* IPFire is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* IPFire is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with IPFire; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
* Copyright 2002: Mark Wormgoor <mark@wormgoor.com>
|
||||
*
|
||||
*/
|
||||
|
||||
#include "install.h"
|
||||
extern FILE *flog;
|
||||
|
||||
int unattended_setup(struct keyvalue *unattendedkv) {
|
||||
|
||||
struct keyvalue *mainsettings = initkeyvalues();
|
||||
struct keyvalue *ethernetkv = initkeyvalues();
|
||||
FILE *file, *hosts;
|
||||
char commandstring[STRING_SIZE];
|
||||
|
||||
char domainname[STRING_SIZE];
|
||||
char hostname[STRING_SIZE];
|
||||
char keymap[STRING_SIZE];
|
||||
char language[STRING_SIZE];
|
||||
char timezone[STRING_SIZE];
|
||||
char theme[STRING_SIZE];
|
||||
char green_address[STRING_SIZE];
|
||||
char green_netmask[STRING_SIZE];
|
||||
char green_netaddress[STRING_SIZE];
|
||||
char green_broadcast[STRING_SIZE];
|
||||
char root_password[STRING_SIZE];
|
||||
char admin_password[STRING_SIZE];
|
||||
|
||||
findkey(unattendedkv, "DOMAINNAME", domainname);
|
||||
findkey(unattendedkv, "HOSTNAME", hostname);
|
||||
findkey(unattendedkv, "KEYMAP", keymap);
|
||||
findkey(unattendedkv, "LANGUAGE", language);
|
||||
findkey(unattendedkv, "TIMEZONE", timezone);
|
||||
findkey(unattendedkv, "THEME", theme);
|
||||
findkey(unattendedkv, "GREEN_ADDRESS", green_address);
|
||||
findkey(unattendedkv, "GREEN_NETMASK", green_netmask);
|
||||
findkey(unattendedkv, "GREEN_NETADDRESS", green_netaddress);
|
||||
findkey(unattendedkv, "GREEN_BROADCAST", green_broadcast);
|
||||
findkey(unattendedkv, "ROOT_PASSWORD", root_password);
|
||||
findkey(unattendedkv, "ADMIN_PASSWORD", admin_password);
|
||||
|
||||
/* write main/settings. */
|
||||
replacekeyvalue(mainsettings, "DOMAINNAME", domainname);
|
||||
replacekeyvalue(mainsettings, "HOSTNAME", hostname);
|
||||
replacekeyvalue(mainsettings, "KEYMAP", keymap);
|
||||
replacekeyvalue(mainsettings, "LANGUAGE", language);
|
||||
replacekeyvalue(mainsettings, "TIMEZONE", timezone);
|
||||
replacekeyvalue(mainsettings, "THEME", theme);
|
||||
writekeyvalues(mainsettings, "/harddisk" CONFIG_ROOT "/main/settings");
|
||||
freekeyvalues(mainsettings);
|
||||
|
||||
/* do setup stuff */
|
||||
fprintf(flog, "unattended: Starting setup\n");
|
||||
|
||||
/* network */
|
||||
fprintf(flog, "unattended: setting up network configuration\n");
|
||||
|
||||
(void) readkeyvalues(ethernetkv, "/harddisk" CONFIG_ROOT "/ethernet/settings");
|
||||
replacekeyvalue(ethernetkv, "GREEN_ADDRESS", green_address);
|
||||
replacekeyvalue(ethernetkv, "GREEN_NETMASK", green_netmask);
|
||||
replacekeyvalue(ethernetkv, "GREEN_NETADDRESS", green_netaddress);
|
||||
replacekeyvalue(ethernetkv, "GREEN_BROADCAST", green_broadcast);
|
||||
replacekeyvalue(ethernetkv, "CONFIG_TYPE", "0");
|
||||
replacekeyvalue(ethernetkv, "GREEN_DEV", "eth0");
|
||||
write_ethernet_configs(ethernetkv);
|
||||
freekeyvalues(ethernetkv);
|
||||
|
||||
/* timezone */
|
||||
unlink("/harddisk/etc/localtime");
|
||||
snprintf(commandstring, STRING_SIZE, "/harddisk/%s", timezone);
|
||||
link(commandstring, "/harddisk/etc/localtime");
|
||||
|
||||
/* hostname */
|
||||
fprintf(flog, "unattended: writing hostname.conf\n");
|
||||
if (!(file = fopen("/harddisk" CONFIG_ROOT "/main/hostname.conf", "w")))
|
||||
{
|
||||
errorbox("unattended: ERROR writing hostname.conf");
|
||||
return 0;
|
||||
}
|
||||
fprintf(file, "ServerName %s.%s\n", hostname,domainname);
|
||||
fclose(file);
|
||||
|
||||
fprintf(flog, "unattended: writing hosts\n");
|
||||
if (!(hosts = fopen("/harddisk/etc/hosts", "w")))
|
||||
{
|
||||
errorbox("unattended: ERROR writing hosts");
|
||||
return 0;
|
||||
}
|
||||
fprintf(hosts, "127.0.0.1\tlocalhost\n");
|
||||
fprintf(hosts, "%s\t%s.%s\t%s\n", green_address, hostname, domainname, hostname);
|
||||
fclose(hosts);
|
||||
|
||||
fprintf(flog, "unattended: writing hosts.allow\n");
|
||||
if (!(file = fopen("/harddisk/etc/hosts.allow", "w")))
|
||||
{
|
||||
errorbox("unattended: ERROR writing hosts.allow");
|
||||
return 0;
|
||||
}
|
||||
fprintf(file, "sshd : ALL\n");
|
||||
fprintf(file, "ALL : localhost\n");
|
||||
fprintf(file, "ALL : %s/%s\n", green_netaddress, green_netmask);
|
||||
fclose(file);
|
||||
|
||||
fprintf(flog, "unattended: writing hosts.deny\n");
|
||||
if (!(file = fopen("/harddisk/etc/hosts.deny", "w")))
|
||||
{
|
||||
errorbox("unattended: ERROR writing hosts.deny");
|
||||
return 0;
|
||||
}
|
||||
fprintf(file, "ALL : ALL\n");
|
||||
fclose(file);
|
||||
|
||||
/* set root password */
|
||||
fprintf(flog, "unattended: setting root password\n");
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/sbin/chroot /harddisk /bin/sh -c \"echo 'root:%s' | /usr/sbin/chpasswd\"", root_password);
|
||||
if (mysystem(commandstring)) {
|
||||
errorbox("unattended: ERROR setting root password");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* set admin password */
|
||||
fprintf(flog, "unattended: setting admin password\n");
|
||||
snprintf(commandstring, STRING_SIZE,
|
||||
"/sbin/chroot /harddisk /usr/sbin/htpasswd -c -m -b " CONFIG_ROOT "/auth/users admin '%s'", admin_password);
|
||||
if (mysystem(commandstring)) {
|
||||
errorbox("unattended: ERROR setting admin password");
|
||||
return 0;
|
||||
}
|
||||
|
||||
fprintf(flog, "unattended: Setup ended\n");
|
||||
return 1;
|
||||
}
|
||||
Reference in New Issue
Block a user