kernel: rebase aarch64 patchset and add nanopi r2s plus oc devicetree

Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>

src/patches/linux/aarch64/0001-rockchip-dt-nanopi-r2s-change-button-from-restart-to.patch

@@ -1,4 +1,4 @@
-From 937057185cce0a05eea29f307aa3ef498e49138e Mon Sep 17 00:00:00 2001
+From 2d60e513e8a1889714fbe8a160606ec63b484208 Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Tue, 9 Nov 2021 08:52:11 +0100
 Subject: [PATCH 1/8] rockchip: dt: nanopi-r2s: change button from restart to
@@ -28,5 +28,5 @@ index 1445b879ac7a..35b76d7e8ab4 100644
  		};
  	};
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0002-rockchip-dt-nanopi-r2s-change-sysled-trigger-to-hear.patch

@@ -1,4 +1,4 @@
-From ebdbd87a1e1b67755a8e04e93b2bba6a56b2019c Mon Sep 17 00:00:00 2001
+From edc3ad29d3c011ba91c8f5ee2399c21086a2cf1e Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Tue, 9 Nov 2021 08:55:06 +0100
 Subject: [PATCH 2/8] rockchip: dt: nanopi-r2s: change sysled trigger to
@@ -22,5 +22,5 @@ index 35b76d7e8ab4..16caf1e32259 100644
  
  		wan_led: led-2 {
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0003-rockchip-dt-nanopi-r4s-fix-led-names-and-button.patch

@@ -1,4 +1,4 @@
-From 38b042cba08034365a6b152202e943883ee12c95 Mon Sep 17 00:00:00 2001
+From bce6688912ade6dcb227e60f58b7a150aad4b2fc Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Tue, 25 Jan 2022 18:04:28 +0100
 Subject: [PATCH 3/8] rockchip: dt: nanopi-r4s: fix led names and button
@@ -47,5 +47,5 @@ index fe5b52610010..9125f013438d 100644
  	};
  
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0004-rockchip-dt-nanopi-r4s-add-realtek-pci-devicenode.patch

@@ -1,4 +1,4 @@
-From 6039099142af6cba233ab72b49f70605b611d1c6 Mon Sep 17 00:00:00 2001
+From ef1fa9320c957717d1544dc466042b31695a1b94 Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Fri, 28 Jan 2022 17:20:56 +0100
 Subject: [PATCH 4/8] rockchip: dt: nanopi-r4s: add realtek pci devicenode
@@ -42,5 +42,5 @@ index 9125f013438d..5a60460bd974 100644
  
  &pinctrl {
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0005-mmc-core-set-initial-signal-voltage-on-power-off.patch

@@ -1,4 +1,4 @@
-From dfacc132a5be8eb643495f8ca693fd59368cc262 Mon Sep 17 00:00:00 2001
+From 2b121723dac68ed0817201a289cf766a5100e8a5 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Sun, 17 Feb 2019 22:14:38 +0000
 Subject: [PATCH 5/8] mmc: core: set initial signal voltage on power off
@@ -23,10 +23,10 @@ Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
  1 file changed, 8 insertions(+)
 
 diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
-index 3d3e0ca52614..33cb13b7bf88 100644
+index a8c17b4cd737..16a4d660cbbe 100644
 --- a/drivers/mmc/core/core.c
 +++ b/drivers/mmc/core/core.c
-@@ -1363,6 +1363,14 @@ void mmc_power_off(struct mmc_host *host)
+@@ -1368,6 +1368,14 @@ void mmc_power_off(struct mmc_host *host)
  	if (host->ios.power_mode == MMC_POWER_OFF)
  		return;
  
@@ -42,5 +42,5 @@ index 3d3e0ca52614..33cb13b7bf88 100644
  
  	host->ios.clock = 0;
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0006-pcie-rockchip-host-try-again-if-training-fail.patch

@@ -1,4 +1,4 @@
-From 828dc7d5beca4c10db50330d1858cd70588bff5d Mon Sep 17 00:00:00 2001
+From 018eddc7f56efa7addd2d871434e71319bb334df Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Sat, 5 Feb 2022 15:35:57 +0000
 Subject: [PATCH 6/8] pcie-rockchip-host: try again if training fail.
@@ -35,5 +35,5 @@ index afbbdccd195d..5d75189e64e5 100644
  	err = rockchip_pcie_init_irq_domain(rockchip);
  	if (err < 0)
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0007-rockchip-dt-add-overclocked-NanoPi-R4S.patch

@@ -1,4 +1,4 @@
-From a7489da29122b1aa890c1186e63d1ad4ba610bb9 Mon Sep 17 00:00:00 2001
+From c9be84478925e2cde05a6c099073525af7f497af Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
 Date: Fri, 11 Feb 2022 09:34:40 +0000
 Subject: [PATCH 7/8] rockchip: dt: add overclocked NanoPi R4S
@@ -11,10 +11,10 @@ Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s-oc.dts
 
 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
-index e7728007fd1b..f32fe64a84ed 100644
+index 259e59594bf2..9b7394e72104 100644
 --- a/arch/arm64/boot/dts/rockchip/Makefile
 +++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
+@@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4b.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb
@@ -56,5 +56,5 @@ index 000000000000..7268d2209f52
 +	};
 +};
 -- 
-2.34.1
+2.39.5
 

src/patches/linux/aarch64/0008-rockchip-dt-add-some-overclocked-rk3328-boards.patch

@@ -1,31 +1,34 @@
-From 5d1a97bca7efef833d4a9577c8a4951933f01303 Mon Sep 17 00:00:00 2001
+From 9c4b72a28a0cdb42a9c8f63141fec6c637ad1854 Mon Sep 17 00:00:00 2001
 From: Arne Fitzenreiter <arne_f@ipfire.org>
-Date: Sun, 19 Nov 2023 13:27:36 +0000
+Date: Wed, 20 Nov 2024 09:41:13 +0100
 Subject: [PATCH 8/8] rockchip: dt: add some overclocked rk3328 boards
 
 nanopi-r2c, nanopi-r2c-plus-oc, nanopi-r2s-oc,
-orangepi-r1-plus-lts-oc, orangepi-r1-plus-oc
+nanopi-r2s-plus oc, orangepi-r1-plus-lts-oc,
+orangepi-r1-plus-oc
 
 Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>
 ---
- arch/arm64/boot/dts/rockchip/Makefile         |  5 ++++
+ arch/arm64/boot/dts/rockchip/Makefile         |  6 +++++
  .../dts/rockchip/rk3328-nanopi-r2c-oc.dts     | 25 +++++++++++++++++++
  .../rockchip/rk3328-nanopi-r2c-plus-oc.dts    | 25 +++++++++++++++++++
  .../dts/rockchip/rk3328-nanopi-r2s-oc.dts     | 25 +++++++++++++++++++
+ .../rockchip/rk3328-nanopi-r2s-plus-oc.dts    | 25 +++++++++++++++++++
  .../rk3328-orangepi-r1-plus-lts-oc.dts        | 25 +++++++++++++++++++
  .../rockchip/rk3328-orangepi-r1-plus-oc.dts   | 25 +++++++++++++++++++
- 6 files changed, 130 insertions(+)
+ 7 files changed, 156 insertions(+)
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-oc.dts
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c-plus-oc.dts
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-oc.dts
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts
  create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-oc.dts
 
 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
-index f32fe64a84ed..4d1cb2b32572 100644
+index 9b7394e72104..5f7c5f56f804 100644
 --- a/arch/arm64/boot/dts/rockchip/Makefile
 +++ b/arch/arm64/boot/dts/rockchip/Makefile
-@@ -15,10 +15,15 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb
+@@ -15,11 +15,17 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
@@ -33,6 +36,8 @@ index f32fe64a84ed..4d1cb2b32572 100644
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus.dtb
 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c-plus-oc.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus.dtb
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-plus-oc.dtb
 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s-oc.dtb
  dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
 +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus-oc.dtb
@@ -134,6 +139,37 @@ index 000000000000..b94dc24d44e5
 +		};
 +	};
 +};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts
+new file mode 100644
+index 000000000000..963765f63341
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s-plus-oc.dts
+@@ -0,0 +1,25 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * overclock Nanopi R2S plus to 1.5 Ghz
++ */
++
++/dts-v1/;
++
++#include "rk3328-nanopi-r2s-plus.dts"
++
++/ {
++	model = "FriendlyElec NanoPi R2S OC";
++
++	cpu0_opp_table: opp-table-0 {
++		opp-1392000000 {
++			opp-hz = /bits/ 64 <1392000000>;
++			opp-microvolt = <1350000>;
++			clock-latency-ns = <40000>;
++		};
++		opp-1512000000 {
++			opp-hz = /bits/ 64 <1512000000>;
++			opp-microvolt = <1400000>;
++			clock-latency-ns = <40000>;
++		};
++	};
++};
 diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts-oc.dts
 new file mode 100644
 index 000000000000..1cc615a5d8e0
@@ -197,5 +233,5 @@ index 000000000000..1a420d214f12
 +	};
 +};
 -- 
-2.34.1
+2.39.5