Pullrequest for Luckfox Pico Pi (#246)

* sysdrv/source/kernel/arch/arm/boot/dts : Add Luckfox Pico Pi device tree files

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/arch/arm/configs : Add Add kernel configuration file support for SIM7600G

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/drivers/usb/serial : Add USB serial driver support for SIM7600G

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay/overlay-luckfox-config/usr/bin/luckfox-config : Add support for Luckfox Pico Pi and comments

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC : Add BoardConfig files and post script for Luckfox Pico Pi

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/build.sh : Add the lunch menu item of Luckfox Pico Pi

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay : Add SIM7600G overlay files

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/drivers/media/i2c/sc3336.c : Set the SC3336 to use the 30fps mode by default

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

---------

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
2025-03-12 21:51:58 +08:00
committed by GitHub
parent 485f09ece6
commit a984090f06
20 changed files with 2417 additions and 272 deletions

View File

@@ -0,0 +1,102 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106.dtsi"
#include "rv1106-luckfox-pico-pi-ipc.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/media-bus-format.h>
/ {
model = "Luckfox Pico Pi";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
restart-poweroff {
compatible = "restart-poweroff";
};
};
/**********CRU**********/
//&cru {
// assigned-clocks =
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
// <&cru ARMCLK>,
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
// assigned-clock-rates =
// <1188000000>, <700000000>,
// <1104000000>,
// <400000000>, <200000000>,
// <100000000>, <300000000>,
// <100000000>, <100000000>,
// <200000000>, <700000000>;
//};
/**********NPU**********/
//&npu {
// assigned-clock-rates = <700000000>;
//};
/**********EMMC**********/
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
// mmc-hs200-1_8v;
rockchip,default-sample-phase = <90>;
no-sdio;
no-sd;
memory-region-ecsd = <&mmc_ecsd>;
post-power-on-delay-ms = <0>;
status = "okay";
};
&fiq_debugger {
rockchip,irq-mode-enable = <1>;
status = "okay";
};
/**********SD_CARD**********/
&sdio {
max-frequency = <50000000>;
no-sdio;
no-mmc;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
status = "okay";
};
/**********ETH**********/
&gmac {
status = "okay";
};
/**********USB**********/
&usbdrd_dwc3 {
status = "okay";
dr_mode = "peripheral";
//dr_mode = "host";
};
/**********RTC**********/
&rtc {
status = "okay";
};
/**********SPI**********/
&spi0 {
status = "disabled";
spidev@0 {
spi-max-frequency = <50000000>;
};
};