mirror of
https://github.com/LuckfoxTECH/luckfox-pico.git
synced 2026-01-18 03:28:19 +01:00
Pullrequest for Luckfox Pico Pi (#246)
* sysdrv/source/kernel/arch/arm/boot/dts : Add Luckfox Pico Pi device tree files Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/configs : Add Add kernel configuration file support for SIM7600G Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/usb/serial : Add USB serial driver support for SIM7600G Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC/overlay/overlay-luckfox-config/usr/bin/luckfox-config : Add support for Luckfox Pico Pi and comments Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC : Add BoardConfig files and post script for Luckfox Pico Pi Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/build.sh : Add the lunch menu item of Luckfox Pico Pi Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC/overlay : Add SIM7600G overlay files Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/media/i2c/sc3336.c : Set the SC3336 to use the 30fps mode by default Signed-off-by: luckfox-eng29 <eng29@luckfox.com> --------- Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
410
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-pi-ipc.dtsi
Executable file
410
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-pi-ipc.dtsi
Executable file
@@ -0,0 +1,410 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include "rv1106-evb.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/display/media-bus-format.h>
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/ {
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
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};
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reserved_memory: reserved-memory {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mmc_ecsd: mmc@3f000 {
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reg = <0x3f000 0x00001000>;
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};
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};
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acodec_sound: acodec-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rv1106-acodec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&acodec>;
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};
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};
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dsm_sound: dsm-sound {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "rockchip,dsm-sound";
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simple-audio-card,bitclock-master = <&sndcodec>;
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simple-audio-card,frame-master = <&sndcodec>;
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sndcpu: simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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sndcodec: simple-audio-card,codec {
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sound-dai = <&dsm>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_arm: vdd-arm {
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compatible = "regulator-fixed";
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-init-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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};
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leds: leds {
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compatible = "gpio-leds";
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work_led: work{
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gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "activity";
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default-state = "on";
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};
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};
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};
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/***************************** audio ********************************/
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&i2s0_8ch {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&acodec {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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/************************* FIQ_DUBUGGER ****************************/
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&fiq_debugger {
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rockchip,irq-mode-enable = <1>;
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status = "okay";
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};
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/***************************** USB *********************************/
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon = <&u2phy>;
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status = "okay";
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};
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/***************************** DSM *********************************/
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&dsm {
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status = "disabled";
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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/*************************** CSI *********************************/
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3336_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mis5001_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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//pinctrl-0 = <&i2c4m2_xfer>;
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sc3336: sc3336@30 {
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compatible = "smartsens,sc3336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2119-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3336_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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mis5001: mis5001@31 {
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compatible = "imagedesign,mis5001";
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status = "okay";
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reg = <0x31>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2115-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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mis5001_out: endpoint {
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remote-endpoint = <&csi_dphy_input1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp_in>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port@0 {
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isp_in: endpoint {
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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/***************************** ADC ********************************/
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&tsadc {
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status = "okay";
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};
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/**************************** PINCTRL ******************************/
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// SPI
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&spi0 {
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pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
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#address-cells = <1>;
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#size-cells = <0>;
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spidev@0 {
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compatible = "rockchip,spidev";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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};
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// I2C
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&i2c1 {
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pinctrl-0 = <&i2c1m1_xfer>;
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};
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&i2c2 {
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pinctrl-0 = <&i2c2m0_xfer>;
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};
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&i2c3 {
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pinctrl-0 = <&i2c3m0_xfer &i2c3m1_xfer &i2c3m2_xfer>;
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};
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&i2c4 {
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pinctrl-0 = <&i2c4m0_xfer &i2c4m1_xfer &i2c4m2_xfer>;
|
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};
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// UART
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&uart0 {
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pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
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};
|
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&uart1 {
|
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pinctrl-0 = <&uart1m1_xfer>;
|
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};
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&uart3 {
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pinctrl-0 = <&uart3m0_xfer &uart3m1_xfer>;
|
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};
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&uart4 {
|
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pinctrl-0 = <&uart4m0_xfer &uart4m1_xfer>;
|
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};
|
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&uart5 {
|
||||
pinctrl-0 = <&uart5m1_xfer>;
|
||||
};
|
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|
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// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm1 {
|
||||
pinctrl-0 = <&pwm1m1_pins &pwm1m2_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m0_pins &pwm2m1_pins &pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m1_pins &pwm3m2_pins>;
|
||||
};
|
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&pwm4 {
|
||||
pinctrl-0 = <&pwm4m0_pins &pwm4m1_pins &pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm7 {
|
||||
pinctrl-0 = <&pwm7m0_pins &pwm7m1_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
161
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pi-w.dts
Executable file
161
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pi-w.dts
Executable file
@@ -0,0 +1,161 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-luckfox-pico-pi-ipc.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pi W";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
|
||||
restart-poweroff {
|
||||
compatible = "restart-poweroff";
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
uart_rts_gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,wake_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********EMMC**********/
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
// mmc-hs200-1_8v;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
memory-region-ecsd = <&mmc_ecsd>;
|
||||
post-power-on-delay-ms = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SDIO-WIFI**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
// no-sd;
|
||||
// no-mmc;
|
||||
supports-sdio;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl{
|
||||
sdmmc0{
|
||||
sdmmc0_det: sdmmc0-det {
|
||||
rockchip,pins =
|
||||
/* sdmmc0_det */
|
||||
<3 RK_PA1 1 &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SD-CARD*********/
|
||||
&sdio {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
supports-sd;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
//dr_mode = "host";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********BT**********/
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
102
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pi.dts
Executable file
102
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pi.dts
Executable file
@@ -0,0 +1,102 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-luckfox-pico-pi-ipc.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pi";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
|
||||
restart-poweroff {
|
||||
compatible = "restart-poweroff";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********EMMC**********/
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
// mmc-hs200-1_8v;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
memory-region-ecsd = <&mmc_ecsd>;
|
||||
post-power-on-delay-ms = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SD_CARD**********/
|
||||
&sdio {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
supports-sd;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
//dr_mode = "host";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
16
sysdrv/source/kernel/arch/arm/configs/luckfox_rv1106-wwan-ndis-ppp.config
Executable file
16
sysdrv/source/kernel/arch/arm/configs/luckfox_rv1106-wwan-ndis-ppp.config
Executable file
@@ -0,0 +1,16 @@
|
||||
CONFIG_USB_NET_DRIVERS=y
|
||||
CONFIG_PPP=y
|
||||
CONFIG_PPP_BSDCOMP=y
|
||||
CONFIG_PPP_DEFLATE=y
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPP_ASYNC=y
|
||||
CONFIG_PPP_SYNC_TTY=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_RNDIS_HOST=y
|
||||
CONFIG_USB_NET_QMI_WWAN=y
|
||||
CONFIG_USB_WDM=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIALIPW=y
|
||||
CONFIG_USB_SERIAL_OPTION=y
|
||||
CONFIG_USB_SERIAL_QUALCOMM=y
|
||||
Reference in New Issue
Block a user