Pullrequest for Luckfox Pico Pi (#246)

* sysdrv/source/kernel/arch/arm/boot/dts : Add Luckfox Pico Pi device tree files

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/arch/arm/configs : Add Add kernel configuration file support for SIM7600G

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/drivers/usb/serial : Add USB serial driver support for SIM7600G

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay/overlay-luckfox-config/usr/bin/luckfox-config : Add support for Luckfox Pico Pi and comments

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC : Add BoardConfig files and post script for Luckfox Pico Pi

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/build.sh : Add the lunch menu item of Luckfox Pico Pi

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* project/cfg/BoardConfig_IPC/overlay : Add SIM7600G overlay files

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

* sysdrv/source/kernel/drivers/media/i2c/sc3336.c : Set the SC3336 to use the 30fps mode by default

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

---------

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
2025-03-12 21:51:58 +08:00
committed by GitHub
parent 485f09ece6
commit a984090f06
20 changed files with 2417 additions and 272 deletions

View File

@@ -0,0 +1,410 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#include "rv1106-evb.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/media-bus-format.h>
/ {
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
};
reserved_memory: reserved-memory {
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
ranges;
mmc_ecsd: mmc@3f000 {
reg = <0x3f000 0x00001000>;
};
};
acodec_sound: acodec-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "rv1106-acodec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&acodec>;
};
};
dsm_sound: dsm-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,dsm-sound";
simple-audio-card,bitclock-master = <&sndcodec>;
simple-audio-card,frame-master = <&sndcodec>;
sndcpu: simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
sndcodec: simple-audio-card,codec {
sound-dai = <&dsm>;
};
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_arm: vdd-arm {
compatible = "regulator-fixed";
regulator-name = "vdd_arm";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-init-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
};
leds: leds {
compatible = "gpio-leds";
work_led: work{
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "activity";
default-state = "on";
};
};
};
/***************************** audio ********************************/
&i2s0_8ch {
#sound-dai-cells = <0>;
status = "okay";
};
&acodec {
#sound-dai-cells = <0>;
status = "okay";
};
/************************* FIQ_DUBUGGER ****************************/
&fiq_debugger {
rockchip,irq-mode-enable = <1>;
status = "okay";
};
/***************************** USB *********************************/
&u2phy {
status = "okay";
};
&u2phy_otg {
status = "okay";
};
&usbdrd {
status = "okay";
};
&usbdrd_dwc3 {
extcon = <&u2phy>;
status = "okay";
};
/***************************** DSM *********************************/
&dsm {
status = "disabled";
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
/*************************** CSI *********************************/
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input0: endpoint@0 {
reg = <0>;
remote-endpoint = <&sc3336_out>;
data-lanes = <1 2>;
};
csi_dphy_input1: endpoint@1 {
reg = <1>;
remote-endpoint = <&mis5001_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
//pinctrl-0 = <&i2c4m2_xfer>;
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2119-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc3336_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
mis5001: mis5001@31 {
compatible = "imagedesign,mis5001";
status = "okay";
reg = <0x31>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2115-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
mis5001_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
data-lanes = <1 2>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_in>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port@0 {
isp_in: endpoint {
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
/***************************** ADC ********************************/
&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};
&tsadc {
status = "okay";
};
/**************************** PINCTRL ******************************/
// SPI
&spi0 {
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
// I2C
&i2c1 {
pinctrl-0 = <&i2c1m1_xfer>;
};
&i2c2 {
pinctrl-0 = <&i2c2m0_xfer>;
};
&i2c3 {
pinctrl-0 = <&i2c3m0_xfer &i2c3m1_xfer &i2c3m2_xfer>;
};
&i2c4 {
pinctrl-0 = <&i2c4m0_xfer &i2c4m1_xfer &i2c4m2_xfer>;
};
// UART
&uart0 {
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
};
&uart1 {
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
pinctrl-0 = <&uart3m0_xfer &uart3m1_xfer>;
};
&uart4 {
pinctrl-0 = <&uart4m0_xfer &uart4m1_xfer>;
};
&uart5 {
pinctrl-0 = <&uart5m1_xfer>;
};
// PWM
&pwm0 {
pinctrl-0 = <&pwm0m1_pins>;
};
&pwm1 {
pinctrl-0 = <&pwm1m1_pins &pwm1m2_pins>;
};
&pwm2 {
pinctrl-0 = <&pwm2m0_pins &pwm2m1_pins &pwm2m2_pins>;
};
&pwm3 {
pinctrl-0 = <&pwm3m1_pins &pwm3m2_pins>;
};
&pwm4 {
pinctrl-0 = <&pwm4m0_pins &pwm4m1_pins &pwm4m2_pins>;
};
&pwm5 {
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
};
&pwm6 {
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
};
&pwm7 {
pinctrl-0 = <&pwm7m0_pins &pwm7m1_pins>;
};
&pwm8 {
pinctrl-0 = <&pwm8m1_pins>;
};
&pwm9 {
pinctrl-0 = <&pwm9m1_pins>;
};
&pwm10 {
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
};
&pwm11 {
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
};
&pinctrl {
spi0 {
spi0m0_clk: spi0m0-clk {
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
};
spi0m0_mosi: spi0m0-mosi {
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
};
spi0m0_miso: spi0m0-miso {
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
};
spi0m0_cs0: spi0m0-cs0 {
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
};
};
};

View File

@@ -0,0 +1,161 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106.dtsi"
#include "rv1106-luckfox-pico-pi-ipc.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/media-bus-format.h>
/ {
model = "Luckfox Pico Pi W";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
restart-poweroff {
compatible = "restart-poweroff";
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
uart_rts_gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,wake_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
/**********CRU**********/
//&cru {
// assigned-clocks =
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
// <&cru ARMCLK>,
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
// assigned-clock-rates =
// <1188000000>, <700000000>,
// <1104000000>,
// <400000000>, <200000000>,
// <100000000>, <300000000>,
// <100000000>, <100000000>,
// <200000000>, <700000000>;
//};
/**********NPU**********/
//&npu {
// assigned-clock-rates = <700000000>;
//};
/**********EMMC**********/
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
// mmc-hs200-1_8v;
rockchip,default-sample-phase = <90>;
no-sdio;
no-sd;
memory-region-ecsd = <&mmc_ecsd>;
post-power-on-delay-ms = <0>;
status = "okay";
};
&fiq_debugger {
rockchip,irq-mode-enable = <1>;
status = "okay";
};
/**********SDIO-WIFI**********/
&sdmmc {
max-frequency = <50000000>;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
non-removable;
rockchip,default-sample-phase = <90>;
// no-sd;
// no-mmc;
supports-sdio;
mmc-pwrseq = <&sdio_pwrseq>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
status = "okay";
};
&pinctrl{
sdmmc0{
sdmmc0_det: sdmmc0-det {
rockchip,pins =
/* sdmmc0_det */
<3 RK_PA1 1 &pcfg_pull_down>;
};
};
};
/**********SD-CARD*********/
&sdio {
max-frequency = <50000000>;
no-sdio;
no-mmc;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
status = "okay";
};
/**********ETH**********/
&gmac {
status = "okay";
};
/**********USB**********/
&usbdrd_dwc3 {
status = "okay";
dr_mode = "peripheral";
//dr_mode = "host";
};
/**********RTC**********/
&rtc {
status = "okay";
};
/**********BT**********/
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
&pinctrl {
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
/**********SPI**********/
&spi0 {
status = "disabled";
spidev@0 {
spi-max-frequency = <50000000>;
};
};

View File

@@ -0,0 +1,102 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106.dtsi"
#include "rv1106-luckfox-pico-pi-ipc.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/display/media-bus-format.h>
/ {
model = "Luckfox Pico Pi";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
restart-poweroff {
compatible = "restart-poweroff";
};
};
/**********CRU**********/
//&cru {
// assigned-clocks =
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
// <&cru ARMCLK>,
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
// assigned-clock-rates =
// <1188000000>, <700000000>,
// <1104000000>,
// <400000000>, <200000000>,
// <100000000>, <300000000>,
// <100000000>, <100000000>,
// <200000000>, <700000000>;
//};
/**********NPU**********/
//&npu {
// assigned-clock-rates = <700000000>;
//};
/**********EMMC**********/
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
// mmc-hs200-1_8v;
rockchip,default-sample-phase = <90>;
no-sdio;
no-sd;
memory-region-ecsd = <&mmc_ecsd>;
post-power-on-delay-ms = <0>;
status = "okay";
};
&fiq_debugger {
rockchip,irq-mode-enable = <1>;
status = "okay";
};
/**********SD_CARD**********/
&sdio {
max-frequency = <50000000>;
no-sdio;
no-mmc;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4>;
status = "okay";
};
/**********ETH**********/
&gmac {
status = "okay";
};
/**********USB**********/
&usbdrd_dwc3 {
status = "okay";
dr_mode = "peripheral";
//dr_mode = "host";
};
/**********RTC**********/
&rtc {
status = "okay";
};
/**********SPI**********/
&spi0 {
status = "disabled";
spidev@0 {
spi-max-frequency = <50000000>;
};
};

View File

@@ -0,0 +1,16 @@
CONFIG_USB_NET_DRIVERS=y
CONFIG_PPP=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_USB_USBNET=y
CONFIG_USB_NET_RNDIS_HOST=y
CONFIG_USB_NET_QMI_WWAN=y
CONFIG_USB_WDM=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIALIPW=y
CONFIG_USB_SERIAL_OPTION=y
CONFIG_USB_SERIAL_QUALCOMM=y

View File

@@ -461,23 +461,6 @@ static const struct regval sc3336_linear_10_2304x1296_30fps_regs[] = {
};
static const struct sc3336_mode supported_modes[] = {
{
.width = 2304,
.height = 1296,
.max_fps = {
.numerator = 10000,
.denominator = 250000,
},
.exp_def = 0x0080,
.hts_def = 0x05dc,
.vts_def = 0x0654,
.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
.reg_list = sc3336_linear_10_2304x1296_25fps_regs,
.hdr_mode = NO_HDR,
.xvclk_freq = 27000000,
.link_freq_idx = 0,
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
},
{
.width = 2304,
.height = 1296,
@@ -494,6 +477,23 @@ static const struct sc3336_mode supported_modes[] = {
.xvclk_freq = 24000000,
.link_freq_idx = 1,
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
},
{
.width = 2304,
.height = 1296,
.max_fps = {
.numerator = 10000,
.denominator = 250000,
},
.exp_def = 0x0080,
.hts_def = 0x05dc,
.vts_def = 0x0654,
.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
.reg_list = sc3336_linear_10_2304x1296_25fps_regs,
.hdr_mode = NO_HDR,
.xvclk_freq = 27000000,
.link_freq_idx = 0,
.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
}
};

View File

@@ -606,6 +606,10 @@ static void option_instat_callback(struct urb *urb);
static const struct usb_device_id option_ids[] = {
#if 1 /* Added by Simcom */
{ USB_DEVICE(0x05c6, 0x90DB) },
{ USB_DEVICE(0x1e0e, 0x9001) },
#endif
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA_LIGHT) },
@@ -2229,6 +2233,9 @@ static struct usb_serial_driver option_1port_device = {
#ifdef CONFIG_PM
.suspend = usb_wwan_suspend,
.resume = usb_wwan_resume,
#if 1 /* Added by Simcom */
.reset_resume = usb_wwan_resume,
#endif
#endif
};
@@ -2253,6 +2260,16 @@ static int option_probe(struct usb_serial *serial,
&serial->interface->cur_altsetting->desc;
unsigned long device_flags = id->driver_info;
#if 1 /* Added by Simcom */
if (serial->dev->descriptor.idVendor == cpu_to_le16(0x05C6) && serial->dev->descriptor.idProduct == cpu_to_le16(0x90DB)
&& serial->interface->cur_altsetting->desc.bInterfaceNumber >= 2)
return -ENODEV;
if (serial->dev->descriptor.idVendor == cpu_to_le16(0x1E0E) && serial->dev->descriptor.idProduct == cpu_to_le16(0x9001)
&& serial->interface->cur_altsetting->desc.bInterfaceNumber >=5)
return -ENODEV;
#endif
/* Never bind to the CD-Rom emulation interface */
if (iface_desc->bInterfaceClass == USB_CLASS_MASS_STORAGE)
return -ENODEV;

View File

@@ -481,6 +481,13 @@ static struct urb *usb_wwan_setup_urb(struct usb_serial_port *port,
if (intfdata->use_zlp && dir == USB_DIR_OUT)
urb->transfer_flags |= URB_ZERO_PACKET;
#if 1 /* Added by Simcom for Zero Packet */
if (dir == USB_DIR_OUT) {
if (serial->dev->descriptor.idVendor == cpu_to_le16(0x1E0E))
urb->transfer_flags |= URB_ZERO_PACKET;
}
#endif
return urb;
}