project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.

project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>

sysdrv/source/uboot/u-boot/drivers/misc/Kconfig

@@ -85,6 +85,12 @@ config ROCKCHIP_HW_DECOMPRESS
 	  This driver support Decompress IP built-in Rockchip SoC, support
 	  LZ4, GZIP, PNG, ZLIB.
 
+config ROCKCHIP_PM_CONFIG
+	bool "Rockchip PM Config Support"
+	depends on ARM_CPU_SUSPEND
+	help
+	  This driver supports to configure parameters of system sleep.
+
 config SPL_ROCKCHIP_HW_DECOMPRESS
 	bool "Rockchip HardWare Decompress Support"
 	depends on SPL_MISC_DECOMPRESS

sysdrv/source/uboot/u-boot/drivers/misc/Makefile

@@ -18,6 +18,7 @@ obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_ROCKCHIP_PM_CONFIG) += rockchip_pm_config.o
 endif
 obj-$(CONFIG_FSL_IIM) += fsl_iim.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
@@ -55,36 +56,17 @@ obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
 
-ifdef CONFIG_ROCKCHIP_RK3308
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3308-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_PX30
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += px30-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RK3328
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3328-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RK3568
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3568-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RV1106
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rv1106-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RV1126
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rv1126-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RK3588
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3588-secure-otp.o
-endif
-
-ifdef CONFIG_ROCKCHIP_RK3528
-obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP) += rk3528-secure-otp.o
+ifeq ($(CONFIG_$(SPL_TPL_)ROCKCHIP_SECURE_OTP),y)
+obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_PX30)   += px30-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RV1106) += rv1106-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3588) += rk3588-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3528) += rk3528-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3562) += rk3562-secure-otp.o
+obj-$(CONFIG_ROCKCHIP_RK3576) += rk3576-secure-otp.o
 endif
 
 obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_HW_DECOMPRESS) += rockchip_decompress.o

sysdrv/source/uboot/u-boot/drivers/misc/rockchip-otp.c

@@ -246,7 +246,7 @@ static int rockchip_rk3568_otp_read(struct udevice *dev, int offset, void *buf,
 	if (!buffer)
 		return -ENOMEM;
 
-	ret = rockchip_otp_ecc_enable(otp, false);
+	ret = rockchip_otp_ecc_enable(otp, true);
 	if (ret < 0) {
 		printf("%s rockchip_otp_ecc_enable err\n", __func__);
 		return ret;
@@ -463,6 +463,10 @@ static const struct udevice_id rockchip_otp_ids[] = {
 		.compatible = "rockchip,rk3528-otp",
 		.data = (ulong)&rk3568_data,
 	},
+	{
+		.compatible = "rockchip,rk3562-otp",
+		.data = (ulong)&rk3568_data,
+	},
 	{
 		.compatible = "rockchip,rk3568-otp",
 		.data = (ulong)&rk3568_data,

sysdrv/source/uboot/u-boot/drivers/misc/rockchip_decompress.c

@@ -98,6 +98,7 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	struct decom_param *param = (struct decom_param *)buf;
 	unsigned int limit_lo = param->size_dst & 0xffffffff;
 	unsigned int limit_hi = param->size_dst >> 32;
+	u32 irq_status;
 
 #if CONFIG_IS_ENABLED(DM_RESET)
 	reset_assert(&priv->rst);
@@ -118,6 +119,11 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 
 	priv->done = false;
 
+	irq_status = readl(priv->base + DECOM_ISR);
+	/* clear interrupts */
+	if (irq_status)
+		writel(irq_status, priv->base + DECOM_ISR);
+
 	if (param->mode == DECOM_LZ4)
 		writel(LZ4_CONT_CSUM_CHECK_EN |
 		       LZ4_HEAD_CSUM_CHECK_EN |
@@ -137,6 +143,8 @@ static int rockchip_decom_start(struct udevice *dev, void *buf)
 	writel(limit_lo, priv->base + DECOM_LMTSL);
 	writel(limit_hi, priv->base + DECOM_LMTSH);
 
+	if (param->flags && DCOMP_FLG_IRQ_ONESHOT)
+		writel(DECOM_INT_MASK, priv->base + DECOM_IEN);
 	writel(DECOM_ENABLE, priv->base + DECOM_ENR);
 
 	priv->idle_check_once = true;

sysdrv/source/uboot/u-boot/drivers/misc/rockchip_pm_config.c

@@ -0,0 +1,193 @@
+// SPDX-License-Identifier:     GPL-2.0+
+/*
+ * Copyright (C) 2023 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <misc.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <asm/arch/rockchip_smccc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RK_ATAG_MCU_SLP_CORE		0x526b0001
+#define RK_ATAG_MCU_SLP_MAX		0x526b00ff
+#define RK_ATAG_NONE			0x00000000
+
+/* rk_tag related defines */
+#define sleep_tag_next(t)	\
+	((struct rk_sleep_tag *)((__u32 *)(t) + (t)->hdr.size))
+
+struct rk_tag_header {
+	u32 size;
+	u32 tag;
+};
+
+struct rk_sleep_tag {
+	struct rk_tag_header hdr;
+	u32 params[];
+};
+
+struct rk_mcu_sleep_core_tag {
+	struct rk_tag_header hdr;
+	u32 total_size;
+	u32 reserve[13];
+};
+
+struct rk_mcu_sleep_tags {
+	struct rk_mcu_sleep_core_tag core;
+	struct rk_sleep_tag slp_tags;
+};
+
+static int rockchip_pm_config_ioctl(struct udevice *dev,
+				    unsigned long request,
+				    void *buf)
+{
+	int ret = -EINVAL;
+
+	switch (request) {
+	case IOCTL_REQ_START:
+		break;
+	default:
+		printf("Unsupported ioctl: %ld\n", (ulong)request);
+		break;
+	}
+
+	return ret;
+}
+
+static const struct misc_ops rockchip_pm_config_ops = {
+	.ioctl = rockchip_pm_config_ioctl,
+};
+
+static int parse_mcu_sleep_config(ofnode node)
+{
+	int ret, len;
+	ofnode mcu_sleep_node;
+	ofnode child;
+	struct arm_smccc_res res;
+	struct rk_mcu_sleep_tags *config;
+	struct rk_sleep_tag *slp_tag;
+	char *end;
+
+	mcu_sleep_node = ofnode_find_subnode(node, "rockchip-mcu-sleep-cfg");
+	if (ofnode_valid(mcu_sleep_node) == 0) {
+		ret = -ENODEV;
+		goto out;
+	}
+
+	child = ofnode_first_subnode(mcu_sleep_node);
+	if (ofnode_valid(child) == 0) {
+		pr_err("%s: no valid child node in rockchip-mcu-sleep-cfg\n",
+		       __func__);
+		ret = -ENODEV;
+		goto out;
+	}
+
+	/*
+	 * 4kb for sleep parameters
+	 */
+	res = sip_smc_request_share_mem(1, SHARE_PAGE_TYPE_SLEEP);
+	if (res.a0 != 0) {
+		pr_err("%s: no trust memory for mcu_sleep\n", __func__);
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* Initialize core tag */
+	memset((void *)res.a1, 0, sizeof(struct rk_mcu_sleep_tags));
+	config = (struct rk_mcu_sleep_tags *)res.a1;
+	config->core.hdr.tag = RK_ATAG_MCU_SLP_CORE;
+	config->core.hdr.size = sizeof(struct rk_mcu_sleep_core_tag) / sizeof(u32);
+	config->core.total_size = sizeof(struct rk_mcu_sleep_tags) -
+				  sizeof(struct rk_sleep_tag);
+
+	slp_tag = &config->slp_tags;
+
+	/* End point of sleep data  */
+	end = (char *)config + PAGE_SIZE - sizeof(struct rk_sleep_tag);
+
+	ofnode_for_each_subnode(child, mcu_sleep_node) {
+		/* Is overflow? */
+		if ((char *)slp_tag->params >= end)
+			break;
+
+		ret = ofnode_read_u32_array(child, "rockchip,tag",
+					    &slp_tag->hdr.tag, 1);
+		if (ret ||
+		    slp_tag->hdr.tag <= RK_ATAG_MCU_SLP_CORE ||
+		    slp_tag->hdr.tag >= RK_ATAG_MCU_SLP_MAX) {
+			pr_err("%s: no or invalid rockchip,tag in %s\n",
+				__func__, ofnode_get_name(child));
+
+			continue;
+		}
+
+		len = ofnode_read_size(child, "rockchip,params");
+		if (len > 0) {
+			/* Is overflow? */
+			if ((char *)(slp_tag->params + len) >= end) {
+				pr_warn("%s: no more space for rockchip,tag in %s\n",
+					__func__, ofnode_get_name(child));
+				break;
+			}
+
+			ret = ofnode_read_u32_array(child, "rockchip,params",
+						    slp_tag->params,
+						    len / sizeof(u32));
+			if (ret) {
+				pr_err("%s: read rockchip,params error in %s\n",
+				       __func__, ofnode_get_name(child));
+				break;
+			}
+
+			slp_tag->hdr.size =
+				(len + sizeof(struct rk_tag_header)) / sizeof(u32);
+		} else if (len == 0) {
+			slp_tag->hdr.size = 0;
+		} else {
+			continue;
+		}
+
+		config->core.total_size += slp_tag->hdr.size * sizeof(u32);
+
+		slp_tag = sleep_tag_next(slp_tag);
+	}
+
+	/* Add none tag.
+	 * Compiler will combine the follow code as "str xzr, [x28]", but
+	 * "slp->hdr" may not be 8-byte alignment. So we use memset_io instead:
+	 * slp_tag->hdr.size = 0;
+	 * slp_tag->hdr.tag = RK_ATAG_NONE;
+	 */
+	memset_io(&slp_tag->hdr, 0, sizeof(slp_tag->hdr));
+
+	config->core.total_size += sizeof(struct rk_sleep_tag);
+
+	ret = 0;
+
+out:
+	return ret;
+}
+
+static int rockchip_pm_config_probe(struct udevice *dev)
+{
+	parse_mcu_sleep_config(dev_ofnode(dev));
+
+	return 0;
+}
+
+static const struct udevice_id rockchip_pm_config_ids[] = {
+	{ .compatible = "rockchip,pm-rk3588" },
+	{}
+};
+
+U_BOOT_DRIVER(rockchip_pm_config) = {
+	.name = "rockchip_pm_config",
+	.id = UCLASS_MISC,
+	.of_match = rockchip_pm_config_ids,
+	.probe = rockchip_pm_config_probe,
+	.ops = &rockchip_pm_config_ops,
+};