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project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.

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project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
2024-08-21 10:05:47 +08:00
parent e79fd21975
commit 8f34c2760d
20902 changed files with 6567362 additions and 11248383 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_dummy.h
View File

@@ -29,7 +29,11 @@
#include <linux/types.h>
#define KBASE_DUMMY_MODEL_COUNTER_HEADER_DWORDS (4)
#if MALI_USE_CSF
#define KBASE_DUMMY_MODEL_COUNTER_PER_CORE (65)
#else /* MALI_USE_CSF */
#define KBASE_DUMMY_MODEL_COUNTER_PER_CORE (60)
#endif /* !MALI_USE_CSF */
#define KBASE_DUMMY_MODEL_COUNTERS_PER_BIT (4)
#define KBASE_DUMMY_MODEL_COUNTER_ENABLED(enable_mask, ctr_idx) \
(enable_mask & (1 << (ctr_idx / KBASE_DUMMY_MODEL_COUNTERS_PER_BIT)))
@@ -56,7 +60,16 @@
#define KBASE_DUMMY_MODEL_MAX_SAMPLE_SIZE \
(KBASE_DUMMY_MODEL_MAX_NUM_PERF_BLOCKS * KBASE_DUMMY_MODEL_BLOCK_SIZE)
/*
* Bit mask - no. bits set is no. cores
* Values obtained from talking to HW team
* Example: tODx has 10 cores, 0b11 1111 1111 -> 0x3FF
*/
#define DUMMY_IMPLEMENTATION_SHADER_PRESENT (0xFull)
#define DUMMY_IMPLEMENTATION_SHADER_PRESENT_TBEX (0x7FFFull)
#define DUMMY_IMPLEMENTATION_SHADER_PRESENT_TODX (0x3FFull)
#define DUMMY_IMPLEMENTATION_SHADER_PRESENT_TTUX (0x7FFull)
#define DUMMY_IMPLEMENTATION_SHADER_PRESENT_TTIX (0xFFFull)
#define DUMMY_IMPLEMENTATION_TILER_PRESENT (0x1ull)
#define DUMMY_IMPLEMENTATION_L2_PRESENT (0x1ull)
#define DUMMY_IMPLEMENTATION_STACK_PRESENT (0xFull)

38
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_linux.h Normal file
View File

@@ -0,0 +1,38 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
*
* (C) COPYRIGHT 2022 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
* Foundation, and any use by you of this program is subject to the terms
* of such GNU license.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you can access it online at
* http://www.gnu.org/licenses/gpl-2.0.html.
*
*/
/*
* Dummy Model interface
*/
#ifndef _UAPI_KBASE_MODEL_LINUX_H_
#define _UAPI_KBASE_MODEL_LINUX_H_
/* Generic model IRQs */
enum model_linux_irqs {
MODEL_LINUX_JOB_IRQ,
MODEL_LINUX_GPU_IRQ,
MODEL_LINUX_MMU_IRQ,
MODEL_LINUX_NONE_IRQ,
MODEL_LINUX_NUM_TYPE_IRQ
};
#endif /* _UAPI_KBASE_MODEL_LINUX_H_ */

18
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/csf/mali_base_csf_kernel.h
View File

@@ -118,9 +118,21 @@
#define BASE_QUEUE_MAX_PRIORITY (15U)
/* CQS Sync object is an array of __u32 event_mem[2], error field index is 1 */
#define BASEP_EVENT_VAL_INDEX (0U)
#define BASEP_EVENT_ERR_INDEX (1U)
/* Sync32 object fields definition */
#define BASEP_EVENT32_VAL_OFFSET (0U)
#define BASEP_EVENT32_ERR_OFFSET (4U)
#define BASEP_EVENT32_SIZE_BYTES (8U)
/* Sync64 object fields definition */
#define BASEP_EVENT64_VAL_OFFSET (0U)
#define BASEP_EVENT64_ERR_OFFSET (8U)
#define BASEP_EVENT64_SIZE_BYTES (16U)
/* Sync32 object alignment, equal to its size */
#define BASEP_EVENT32_ALIGN_BYTES (8U)
/* Sync64 object alignment, equal to its size */
#define BASEP_EVENT64_ALIGN_BYTES (16U)
/* The upper limit for number of objects that could be waited/set per command.
* This limit is now enforced as internally the error inherit inputs are

10
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/csf/mali_kbase_csf_ioctl.h
View File

@@ -72,10 +72,18 @@
* - base_jit_alloc_info_11_5
* - kbase_ioctl_mem_jit_init_10_2
* - kbase_ioctl_mem_jit_init_11_5
* 1.17:
* - Fix kinstr_prfcnt issues:
* - Missing implicit sample for CMD_STOP when HWCNT buffer is full.
* - Race condition when stopping periodic sampling.
* - prfcnt_block_metadata::block_idx gaps.
* - PRFCNT_CONTROL_CMD_SAMPLE_ASYNC is removed.
* 1.18:
* - CPU mappings of USER_BUFFER imported memory handles must be cached.
*/
#define BASE_UK_VERSION_MAJOR 1
#define BASE_UK_VERSION_MINOR 16
#define BASE_UK_VERSION_MINOR 17
/**
* struct kbase_ioctl_version_check - Check version compatibility between

1
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/gpu/mali_kbase_gpu_id.h
View File

@@ -119,7 +119,6 @@
#define GPU_ID2_PRODUCT_TBEX GPU_ID2_MODEL_MAKE(9, 2)
#define GPU_ID2_PRODUCT_LBEX GPU_ID2_MODEL_MAKE(9, 4)
#define GPU_ID2_PRODUCT_TBAX GPU_ID2_MODEL_MAKE(9, 5)
#define GPU_ID2_PRODUCT_TDUX GPU_ID2_MODEL_MAKE(10, 1)
#define GPU_ID2_PRODUCT_TODX GPU_ID2_MODEL_MAKE(10, 2)
#define GPU_ID2_PRODUCT_TGRX GPU_ID2_MODEL_MAKE(10, 3)
#define GPU_ID2_PRODUCT_TVAX GPU_ID2_MODEL_MAKE(10, 4)

10
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/jm/mali_kbase_jm_ioctl.h
View File

@@ -133,9 +133,17 @@
* - base_jit_alloc_info_11_5
* - kbase_ioctl_mem_jit_init_10_2
* - kbase_ioctl_mem_jit_init_11_5
* 11.37:
* - Fix kinstr_prfcnt issues:
* - Missing implicit sample for CMD_STOP when HWCNT buffer is full.
* - Race condition when stopping periodic sampling.
* - prfcnt_block_metadata::block_idx gaps.
* - PRFCNT_CONTROL_CMD_SAMPLE_ASYNC is removed.
* 11.38:
* - CPU mappings of USER_BUFFER imported memory handles must be cached.
*/
#define BASE_UK_VERSION_MAJOR 11
#define BASE_UK_VERSION_MINOR 36
#define BASE_UK_VERSION_MINOR 37
/**
* struct kbase_ioctl_version_check - Check version compatibility between

4
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/mali_kbase_hwcnt_reader.h
View File

@@ -445,7 +445,7 @@ struct prfcnt_metadata {
* @PRFCNT_CONTROL_CMD_STOP: Stop the counter data dump run for the
* calling client session.
* @PRFCNT_CONTROL_CMD_SAMPLE_SYNC: Trigger a synchronous manual sample.
* @PRFCNT_CONTROL_CMD_SAMPLE_ASYNC: Trigger an asynchronous manual sample.
* @PRFCNT_CONTROL_CMD_RESERVED: Previously SAMPLE_ASYNC not supported any more.
* @PRFCNT_CONTROL_CMD_DISCARD: Discard all samples which have not yet
* been consumed by userspace. Note that
* this can race with new samples if
@@ -455,7 +455,7 @@ enum prfcnt_control_cmd_code {
PRFCNT_CONTROL_CMD_START = 1,
PRFCNT_CONTROL_CMD_STOP,
PRFCNT_CONTROL_CMD_SAMPLE_SYNC,
PRFCNT_CONTROL_CMD_SAMPLE_ASYNC,
PRFCNT_CONTROL_CMD_RESERVED,
PRFCNT_CONTROL_CMD_DISCARD,
};

276
sysdrv/source/kernel/include/uapi/gpu/arm/bifrost/mali_kbase_ioctl.h
View File

@@ -46,8 +46,7 @@ struct kbase_ioctl_set_flags {
__u32 create_flags;
};
#define KBASE_IOCTL_SET_FLAGS \
_IOW(KBASE_IOCTL_TYPE, 1, struct kbase_ioctl_set_flags)
#define KBASE_IOCTL_SET_FLAGS _IOW(KBASE_IOCTL_TYPE, 1, struct kbase_ioctl_set_flags)
/**
* struct kbase_ioctl_get_gpuprops - Read GPU properties from the kernel
@@ -81,8 +80,7 @@ struct kbase_ioctl_get_gpuprops {
__u32 flags;
};
#define KBASE_IOCTL_GET_GPUPROPS \
_IOW(KBASE_IOCTL_TYPE, 3, struct kbase_ioctl_get_gpuprops)
#define KBASE_IOCTL_GET_GPUPROPS _IOW(KBASE_IOCTL_TYPE, 3, struct kbase_ioctl_get_gpuprops)
/**
* union kbase_ioctl_mem_alloc - Allocate memory on the GPU
@@ -108,8 +106,7 @@ union kbase_ioctl_mem_alloc {
} out;
};
#define KBASE_IOCTL_MEM_ALLOC \
_IOWR(KBASE_IOCTL_TYPE, 5, union kbase_ioctl_mem_alloc)
#define KBASE_IOCTL_MEM_ALLOC _IOWR(KBASE_IOCTL_TYPE, 5, union kbase_ioctl_mem_alloc)
/**
* struct kbase_ioctl_mem_query - Query properties of a GPU memory region
@@ -131,12 +128,11 @@ union kbase_ioctl_mem_query {
} out;
};
#define KBASE_IOCTL_MEM_QUERY \
_IOWR(KBASE_IOCTL_TYPE, 6, union kbase_ioctl_mem_query)
#define KBASE_IOCTL_MEM_QUERY _IOWR(KBASE_IOCTL_TYPE, 6, union kbase_ioctl_mem_query)
#define KBASE_MEM_QUERY_COMMIT_SIZE ((__u64)1)
#define KBASE_MEM_QUERY_VA_SIZE ((__u64)2)
#define KBASE_MEM_QUERY_FLAGS ((__u64)3)
#define KBASE_MEM_QUERY_COMMIT_SIZE ((__u64)1)
#define KBASE_MEM_QUERY_VA_SIZE ((__u64)2)
#define KBASE_MEM_QUERY_FLAGS ((__u64)3)
/**
* struct kbase_ioctl_mem_free - Free a memory region
@@ -146,8 +142,7 @@ struct kbase_ioctl_mem_free {
__u64 gpu_addr;
};
#define KBASE_IOCTL_MEM_FREE \
_IOW(KBASE_IOCTL_TYPE, 7, struct kbase_ioctl_mem_free)
#define KBASE_IOCTL_MEM_FREE _IOW(KBASE_IOCTL_TYPE, 7, struct kbase_ioctl_mem_free)
/**
* struct kbase_ioctl_hwcnt_reader_setup - Setup HWC dumper/reader
@@ -167,7 +162,7 @@ struct kbase_ioctl_hwcnt_reader_setup {
__u32 mmu_l2_bm;
};
#define KBASE_IOCTL_HWCNT_READER_SETUP \
#define KBASE_IOCTL_HWCNT_READER_SETUP \
_IOW(KBASE_IOCTL_TYPE, 8, struct kbase_ioctl_hwcnt_reader_setup)
/**
@@ -182,8 +177,7 @@ struct kbase_ioctl_hwcnt_values {
__u32 padding;
};
#define KBASE_IOCTL_HWCNT_SET \
_IOW(KBASE_IOCTL_TYPE, 32, struct kbase_ioctl_hwcnt_values)
#define KBASE_IOCTL_HWCNT_SET _IOW(KBASE_IOCTL_TYPE, 32, struct kbase_ioctl_hwcnt_values)
/**
* struct kbase_ioctl_disjoint_query - Query the disjoint counter
@@ -193,8 +187,7 @@ struct kbase_ioctl_disjoint_query {
__u32 counter;
};
#define KBASE_IOCTL_DISJOINT_QUERY \
_IOR(KBASE_IOCTL_TYPE, 12, struct kbase_ioctl_disjoint_query)
#define KBASE_IOCTL_DISJOINT_QUERY _IOR(KBASE_IOCTL_TYPE, 12, struct kbase_ioctl_disjoint_query)
/**
* struct kbase_ioctl_get_ddk_version - Query the kernel version
@@ -215,8 +208,7 @@ struct kbase_ioctl_get_ddk_version {
__u32 padding;
};
#define KBASE_IOCTL_GET_DDK_VERSION \
_IOW(KBASE_IOCTL_TYPE, 13, struct kbase_ioctl_get_ddk_version)
#define KBASE_IOCTL_GET_DDK_VERSION _IOW(KBASE_IOCTL_TYPE, 13, struct kbase_ioctl_get_ddk_version)
/**
* struct kbase_ioctl_mem_jit_init - Initialize the just-in-time memory
@@ -241,8 +233,7 @@ struct kbase_ioctl_mem_jit_init {
__u64 phys_pages;
};
#define KBASE_IOCTL_MEM_JIT_INIT \
_IOW(KBASE_IOCTL_TYPE, 14, struct kbase_ioctl_mem_jit_init)
#define KBASE_IOCTL_MEM_JIT_INIT _IOW(KBASE_IOCTL_TYPE, 14, struct kbase_ioctl_mem_jit_init)
/**
* struct kbase_ioctl_mem_sync - Perform cache maintenance on memory
@@ -262,8 +253,7 @@ struct kbase_ioctl_mem_sync {
__u8 padding[7];
};
#define KBASE_IOCTL_MEM_SYNC \
_IOW(KBASE_IOCTL_TYPE, 15, struct kbase_ioctl_mem_sync)
#define KBASE_IOCTL_MEM_SYNC _IOW(KBASE_IOCTL_TYPE, 15, struct kbase_ioctl_mem_sync)
/**
* union kbase_ioctl_mem_find_cpu_offset - Find the offset of a CPU pointer
@@ -286,7 +276,7 @@ union kbase_ioctl_mem_find_cpu_offset {
} out;
};
#define KBASE_IOCTL_MEM_FIND_CPU_OFFSET \
#define KBASE_IOCTL_MEM_FIND_CPU_OFFSET \
_IOWR(KBASE_IOCTL_TYPE, 16, union kbase_ioctl_mem_find_cpu_offset)
/**
@@ -298,8 +288,7 @@ struct kbase_ioctl_get_context_id {
__u32 id;
};
#define KBASE_IOCTL_GET_CONTEXT_ID \
_IOR(KBASE_IOCTL_TYPE, 17, struct kbase_ioctl_get_context_id)
#define KBASE_IOCTL_GET_CONTEXT_ID _IOR(KBASE_IOCTL_TYPE, 17, struct kbase_ioctl_get_context_id)
/**
* struct kbase_ioctl_tlstream_acquire - Acquire a tlstream fd
@@ -312,11 +301,9 @@ struct kbase_ioctl_tlstream_acquire {
__u32 flags;
};
#define KBASE_IOCTL_TLSTREAM_ACQUIRE \
_IOW(KBASE_IOCTL_TYPE, 18, struct kbase_ioctl_tlstream_acquire)
#define KBASE_IOCTL_TLSTREAM_ACQUIRE _IOW(KBASE_IOCTL_TYPE, 18, struct kbase_ioctl_tlstream_acquire)
#define KBASE_IOCTL_TLSTREAM_FLUSH \
_IO(KBASE_IOCTL_TYPE, 19)
#define KBASE_IOCTL_TLSTREAM_FLUSH _IO(KBASE_IOCTL_TYPE, 19)
/**
* struct kbase_ioctl_mem_commit - Change the amount of memory backing a region
@@ -333,8 +320,7 @@ struct kbase_ioctl_mem_commit {
__u64 pages;
};
#define KBASE_IOCTL_MEM_COMMIT \
_IOW(KBASE_IOCTL_TYPE, 20, struct kbase_ioctl_mem_commit)
#define KBASE_IOCTL_MEM_COMMIT _IOW(KBASE_IOCTL_TYPE, 20, struct kbase_ioctl_mem_commit)
/**
* union kbase_ioctl_mem_alias - Create an alias of memory regions
@@ -362,8 +348,7 @@ union kbase_ioctl_mem_alias {
} out;
};
#define KBASE_IOCTL_MEM_ALIAS \
_IOWR(KBASE_IOCTL_TYPE, 21, union kbase_ioctl_mem_alias)
#define KBASE_IOCTL_MEM_ALIAS _IOWR(KBASE_IOCTL_TYPE, 21, union kbase_ioctl_mem_alias)
/**
* union kbase_ioctl_mem_import - Import memory for use by the GPU
@@ -391,8 +376,7 @@ union kbase_ioctl_mem_import {
} out;
};
#define KBASE_IOCTL_MEM_IMPORT \
_IOWR(KBASE_IOCTL_TYPE, 22, union kbase_ioctl_mem_import)
#define KBASE_IOCTL_MEM_IMPORT _IOWR(KBASE_IOCTL_TYPE, 22, union kbase_ioctl_mem_import)
/**
* struct kbase_ioctl_mem_flags_change - Change the flags for a memory region
@@ -406,8 +390,7 @@ struct kbase_ioctl_mem_flags_change {
__u64 mask;
};
#define KBASE_IOCTL_MEM_FLAGS_CHANGE \
_IOW(KBASE_IOCTL_TYPE, 23, struct kbase_ioctl_mem_flags_change)
#define KBASE_IOCTL_MEM_FLAGS_CHANGE _IOW(KBASE_IOCTL_TYPE, 23, struct kbase_ioctl_mem_flags_change)
/**
* struct kbase_ioctl_stream_create - Create a synchronisation stream
@@ -424,8 +407,7 @@ struct kbase_ioctl_stream_create {
char name[32];
};
#define KBASE_IOCTL_STREAM_CREATE \
_IOW(KBASE_IOCTL_TYPE, 24, struct kbase_ioctl_stream_create)
#define KBASE_IOCTL_STREAM_CREATE _IOW(KBASE_IOCTL_TYPE, 24, struct kbase_ioctl_stream_create)
/**
* struct kbase_ioctl_fence_validate - Validate a fd refers to a fence
@@ -435,8 +417,7 @@ struct kbase_ioctl_fence_validate {
int fd;
};
#define KBASE_IOCTL_FENCE_VALIDATE \
_IOW(KBASE_IOCTL_TYPE, 25, struct kbase_ioctl_fence_validate)
#define KBASE_IOCTL_FENCE_VALIDATE _IOW(KBASE_IOCTL_TYPE, 25, struct kbase_ioctl_fence_validate)
/**
* struct kbase_ioctl_mem_profile_add - Provide profiling information to kernel
@@ -452,8 +433,7 @@ struct kbase_ioctl_mem_profile_add {
__u32 padding;
};
#define KBASE_IOCTL_MEM_PROFILE_ADD \
_IOW(KBASE_IOCTL_TYPE, 27, struct kbase_ioctl_mem_profile_add)
#define KBASE_IOCTL_MEM_PROFILE_ADD _IOW(KBASE_IOCTL_TYPE, 27, struct kbase_ioctl_mem_profile_add)
/**
* struct kbase_ioctl_sticky_resource_map - Permanently map an external resource
@@ -465,7 +445,7 @@ struct kbase_ioctl_sticky_resource_map {
__u64 address;
};
#define KBASE_IOCTL_STICKY_RESOURCE_MAP \
#define KBASE_IOCTL_STICKY_RESOURCE_MAP \
_IOW(KBASE_IOCTL_TYPE, 29, struct kbase_ioctl_sticky_resource_map)
/**
@@ -479,7 +459,7 @@ struct kbase_ioctl_sticky_resource_unmap {
__u64 address;
};
#define KBASE_IOCTL_STICKY_RESOURCE_UNMAP \
#define KBASE_IOCTL_STICKY_RESOURCE_UNMAP \
_IOW(KBASE_IOCTL_TYPE, 30, struct kbase_ioctl_sticky_resource_unmap)
/**
@@ -507,14 +487,12 @@ union kbase_ioctl_mem_find_gpu_start_and_offset {
} out;
};
#define KBASE_IOCTL_MEM_FIND_GPU_START_AND_OFFSET \
#define KBASE_IOCTL_MEM_FIND_GPU_START_AND_OFFSET \
_IOWR(KBASE_IOCTL_TYPE, 31, union kbase_ioctl_mem_find_gpu_start_and_offset)
#define KBASE_IOCTL_CINSTR_GWT_START \
_IO(KBASE_IOCTL_TYPE, 33)
#define KBASE_IOCTL_CINSTR_GWT_START _IO(KBASE_IOCTL_TYPE, 33)
#define KBASE_IOCTL_CINSTR_GWT_STOP \
_IO(KBASE_IOCTL_TYPE, 34)
#define KBASE_IOCTL_CINSTR_GWT_STOP _IO(KBASE_IOCTL_TYPE, 34)
/**
* union kbase_ioctl_cinstr_gwt_dump - Used to collect all GPU write fault
@@ -547,8 +525,7 @@ union kbase_ioctl_cinstr_gwt_dump {
} out;
};
#define KBASE_IOCTL_CINSTR_GWT_DUMP \
_IOWR(KBASE_IOCTL_TYPE, 35, union kbase_ioctl_cinstr_gwt_dump)
#define KBASE_IOCTL_CINSTR_GWT_DUMP _IOWR(KBASE_IOCTL_TYPE, 35, union kbase_ioctl_cinstr_gwt_dump)
/**
* struct kbase_ioctl_mem_exec_init - Initialise the EXEC_VA memory zone
@@ -559,8 +536,7 @@ struct kbase_ioctl_mem_exec_init {
__u64 va_pages;
};
#define KBASE_IOCTL_MEM_EXEC_INIT \
_IOW(KBASE_IOCTL_TYPE, 38, struct kbase_ioctl_mem_exec_init)
#define KBASE_IOCTL_MEM_EXEC_INIT _IOW(KBASE_IOCTL_TYPE, 38, struct kbase_ioctl_mem_exec_init)
/**
* union kbase_ioctl_get_cpu_gpu_timeinfo - Request zero or more types of
@@ -589,7 +565,7 @@ union kbase_ioctl_get_cpu_gpu_timeinfo {
} out;
};
#define KBASE_IOCTL_GET_CPU_GPU_TIMEINFO \
#define KBASE_IOCTL_GET_CPU_GPU_TIMEINFO \
_IOWR(KBASE_IOCTL_TYPE, 50, union kbase_ioctl_get_cpu_gpu_timeinfo)
/**
@@ -601,7 +577,7 @@ struct kbase_ioctl_context_priority_check {
__u8 priority;
};
#define KBASE_IOCTL_CONTEXT_PRIORITY_CHECK \
#define KBASE_IOCTL_CONTEXT_PRIORITY_CHECK \
_IOWR(KBASE_IOCTL_TYPE, 54, struct kbase_ioctl_context_priority_check)
/**
@@ -613,7 +589,7 @@ struct kbase_ioctl_set_limited_core_count {
__u8 max_core_count;
};
#define KBASE_IOCTL_SET_LIMITED_CORE_COUNT \
#define KBASE_IOCTL_SET_LIMITED_CORE_COUNT \
_IOW(KBASE_IOCTL_TYPE, 55, struct kbase_ioctl_set_limited_core_count)
/**
@@ -634,7 +610,7 @@ struct kbase_ioctl_kinstr_prfcnt_enum_info {
__u64 info_list_ptr;
};
#define KBASE_IOCTL_KINSTR_PRFCNT_ENUM_INFO \
#define KBASE_IOCTL_KINSTR_PRFCNT_ENUM_INFO \
_IOWR(KBASE_IOCTL_TYPE, 56, struct kbase_ioctl_kinstr_prfcnt_enum_info)
/**
@@ -663,7 +639,7 @@ union kbase_ioctl_kinstr_prfcnt_setup {
} out;
};
#define KBASE_IOCTL_KINSTR_PRFCNT_SETUP \
#define KBASE_IOCTL_KINSTR_PRFCNT_SETUP \
_IOWR(KBASE_IOCTL_TYPE, 57, union kbase_ioctl_kinstr_prfcnt_setup)
/***************
@@ -687,8 +663,7 @@ struct kbase_ioctl_tlstream_stats {
__u32 bytes_generated;
};
#define KBASE_IOCTL_TLSTREAM_STATS \
_IOR(KBASE_IOCTL_TEST_TYPE, 2, struct kbase_ioctl_tlstream_stats)
#define KBASE_IOCTL_TLSTREAM_STATS _IOR(KBASE_IOCTL_TEST_TYPE, 2, struct kbase_ioctl_tlstream_stats)
#endif /* MALI_UNIT_TEST */
@@ -706,108 +681,107 @@ struct kbase_ioctl_tlstream_stats {
* _IOWR(KBASE_IOCTL_EXTRA_TYPE, 0, struct my_ioctl_args)
*/
/**********************************
* Definitions for GPU properties *
**********************************/
#define KBASE_GPUPROP_VALUE_SIZE_U8 (0x0)
#define KBASE_GPUPROP_VALUE_SIZE_U16 (0x1)
#define KBASE_GPUPROP_VALUE_SIZE_U32 (0x2)
#define KBASE_GPUPROP_VALUE_SIZE_U64 (0x3)
#define KBASE_GPUPROP_VALUE_SIZE_U8 (0x0)
#define KBASE_GPUPROP_VALUE_SIZE_U16 (0x1)
#define KBASE_GPUPROP_VALUE_SIZE_U32 (0x2)
#define KBASE_GPUPROP_VALUE_SIZE_U64 (0x3)
#define KBASE_GPUPROP_PRODUCT_ID 1
#define KBASE_GPUPROP_VERSION_STATUS 2
#define KBASE_GPUPROP_MINOR_REVISION 3
#define KBASE_GPUPROP_MAJOR_REVISION 4
#define KBASE_GPUPROP_PRODUCT_ID 1
#define KBASE_GPUPROP_VERSION_STATUS 2
#define KBASE_GPUPROP_MINOR_REVISION 3
#define KBASE_GPUPROP_MAJOR_REVISION 4
/* 5 previously used for GPU speed */
#define KBASE_GPUPROP_GPU_FREQ_KHZ_MAX 6
#define KBASE_GPUPROP_GPU_FREQ_KHZ_MAX 6
/* 7 previously used for minimum GPU speed */
#define KBASE_GPUPROP_LOG2_PROGRAM_COUNTER_SIZE 8
#define KBASE_GPUPROP_TEXTURE_FEATURES_0 9
#define KBASE_GPUPROP_TEXTURE_FEATURES_1 10
#define KBASE_GPUPROP_TEXTURE_FEATURES_2 11
#define KBASE_GPUPROP_GPU_AVAILABLE_MEMORY_SIZE 12
#define KBASE_GPUPROP_LOG2_PROGRAM_COUNTER_SIZE 8
#define KBASE_GPUPROP_TEXTURE_FEATURES_0 9
#define KBASE_GPUPROP_TEXTURE_FEATURES_1 10
#define KBASE_GPUPROP_TEXTURE_FEATURES_2 11
#define KBASE_GPUPROP_GPU_AVAILABLE_MEMORY_SIZE 12
#define KBASE_GPUPROP_L2_LOG2_LINE_SIZE 13
#define KBASE_GPUPROP_L2_LOG2_CACHE_SIZE 14
#define KBASE_GPUPROP_L2_NUM_L2_SLICES 15
#define KBASE_GPUPROP_L2_LOG2_LINE_SIZE 13
#define KBASE_GPUPROP_L2_LOG2_CACHE_SIZE 14
#define KBASE_GPUPROP_L2_NUM_L2_SLICES 15
#define KBASE_GPUPROP_TILER_BIN_SIZE_BYTES 16
#define KBASE_GPUPROP_TILER_MAX_ACTIVE_LEVELS 17
#define KBASE_GPUPROP_TILER_BIN_SIZE_BYTES 16
#define KBASE_GPUPROP_TILER_MAX_ACTIVE_LEVELS 17
#define KBASE_GPUPROP_MAX_THREADS 18
#define KBASE_GPUPROP_MAX_WORKGROUP_SIZE 19
#define KBASE_GPUPROP_MAX_BARRIER_SIZE 20
#define KBASE_GPUPROP_MAX_REGISTERS 21
#define KBASE_GPUPROP_MAX_TASK_QUEUE 22
#define KBASE_GPUPROP_MAX_THREAD_GROUP_SPLIT 23
#define KBASE_GPUPROP_IMPL_TECH 24
#define KBASE_GPUPROP_MAX_THREADS 18
#define KBASE_GPUPROP_MAX_WORKGROUP_SIZE 19
#define KBASE_GPUPROP_MAX_BARRIER_SIZE 20
#define KBASE_GPUPROP_MAX_REGISTERS 21
#define KBASE_GPUPROP_MAX_TASK_QUEUE 22
#define KBASE_GPUPROP_MAX_THREAD_GROUP_SPLIT 23
#define KBASE_GPUPROP_IMPL_TECH 24
#define KBASE_GPUPROP_RAW_SHADER_PRESENT 25
#define KBASE_GPUPROP_RAW_TILER_PRESENT 26
#define KBASE_GPUPROP_RAW_L2_PRESENT 27
#define KBASE_GPUPROP_RAW_STACK_PRESENT 28
#define KBASE_GPUPROP_RAW_L2_FEATURES 29
#define KBASE_GPUPROP_RAW_CORE_FEATURES 30
#define KBASE_GPUPROP_RAW_MEM_FEATURES 31
#define KBASE_GPUPROP_RAW_MMU_FEATURES 32
#define KBASE_GPUPROP_RAW_AS_PRESENT 33
#define KBASE_GPUPROP_RAW_JS_PRESENT 34
#define KBASE_GPUPROP_RAW_JS_FEATURES_0 35
#define KBASE_GPUPROP_RAW_JS_FEATURES_1 36
#define KBASE_GPUPROP_RAW_JS_FEATURES_2 37
#define KBASE_GPUPROP_RAW_JS_FEATURES_3 38
#define KBASE_GPUPROP_RAW_JS_FEATURES_4 39
#define KBASE_GPUPROP_RAW_JS_FEATURES_5 40
#define KBASE_GPUPROP_RAW_JS_FEATURES_6 41
#define KBASE_GPUPROP_RAW_JS_FEATURES_7 42
#define KBASE_GPUPROP_RAW_JS_FEATURES_8 43
#define KBASE_GPUPROP_RAW_JS_FEATURES_9 44
#define KBASE_GPUPROP_RAW_JS_FEATURES_10 45
#define KBASE_GPUPROP_RAW_JS_FEATURES_11 46
#define KBASE_GPUPROP_RAW_JS_FEATURES_12 47
#define KBASE_GPUPROP_RAW_JS_FEATURES_13 48
#define KBASE_GPUPROP_RAW_JS_FEATURES_14 49
#define KBASE_GPUPROP_RAW_JS_FEATURES_15 50
#define KBASE_GPUPROP_RAW_TILER_FEATURES 51
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_0 52
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_1 53
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_2 54
#define KBASE_GPUPROP_RAW_GPU_ID 55
#define KBASE_GPUPROP_RAW_THREAD_MAX_THREADS 56
#define KBASE_GPUPROP_RAW_THREAD_MAX_WORKGROUP_SIZE 57
#define KBASE_GPUPROP_RAW_THREAD_MAX_BARRIER_SIZE 58
#define KBASE_GPUPROP_RAW_THREAD_FEATURES 59
#define KBASE_GPUPROP_RAW_COHERENCY_MODE 60
#define KBASE_GPUPROP_RAW_SHADER_PRESENT 25
#define KBASE_GPUPROP_RAW_TILER_PRESENT 26
#define KBASE_GPUPROP_RAW_L2_PRESENT 27
#define KBASE_GPUPROP_RAW_STACK_PRESENT 28
#define KBASE_GPUPROP_RAW_L2_FEATURES 29
#define KBASE_GPUPROP_RAW_CORE_FEATURES 30
#define KBASE_GPUPROP_RAW_MEM_FEATURES 31
#define KBASE_GPUPROP_RAW_MMU_FEATURES 32
#define KBASE_GPUPROP_RAW_AS_PRESENT 33
#define KBASE_GPUPROP_RAW_JS_PRESENT 34
#define KBASE_GPUPROP_RAW_JS_FEATURES_0 35
#define KBASE_GPUPROP_RAW_JS_FEATURES_1 36
#define KBASE_GPUPROP_RAW_JS_FEATURES_2 37
#define KBASE_GPUPROP_RAW_JS_FEATURES_3 38
#define KBASE_GPUPROP_RAW_JS_FEATURES_4 39
#define KBASE_GPUPROP_RAW_JS_FEATURES_5 40
#define KBASE_GPUPROP_RAW_JS_FEATURES_6 41
#define KBASE_GPUPROP_RAW_JS_FEATURES_7 42
#define KBASE_GPUPROP_RAW_JS_FEATURES_8 43
#define KBASE_GPUPROP_RAW_JS_FEATURES_9 44
#define KBASE_GPUPROP_RAW_JS_FEATURES_10 45
#define KBASE_GPUPROP_RAW_JS_FEATURES_11 46
#define KBASE_GPUPROP_RAW_JS_FEATURES_12 47
#define KBASE_GPUPROP_RAW_JS_FEATURES_13 48
#define KBASE_GPUPROP_RAW_JS_FEATURES_14 49
#define KBASE_GPUPROP_RAW_JS_FEATURES_15 50
#define KBASE_GPUPROP_RAW_TILER_FEATURES 51
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_0 52
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_1 53
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_2 54
#define KBASE_GPUPROP_RAW_GPU_ID 55
#define KBASE_GPUPROP_RAW_THREAD_MAX_THREADS 56
#define KBASE_GPUPROP_RAW_THREAD_MAX_WORKGROUP_SIZE 57
#define KBASE_GPUPROP_RAW_THREAD_MAX_BARRIER_SIZE 58
#define KBASE_GPUPROP_RAW_THREAD_FEATURES 59
#define KBASE_GPUPROP_RAW_COHERENCY_MODE 60
#define KBASE_GPUPROP_COHERENCY_NUM_GROUPS 61
#define KBASE_GPUPROP_COHERENCY_NUM_CORE_GROUPS 62
#define KBASE_GPUPROP_COHERENCY_COHERENCY 63
#define KBASE_GPUPROP_COHERENCY_GROUP_0 64
#define KBASE_GPUPROP_COHERENCY_GROUP_1 65
#define KBASE_GPUPROP_COHERENCY_GROUP_2 66
#define KBASE_GPUPROP_COHERENCY_GROUP_3 67
#define KBASE_GPUPROP_COHERENCY_GROUP_4 68
#define KBASE_GPUPROP_COHERENCY_GROUP_5 69
#define KBASE_GPUPROP_COHERENCY_GROUP_6 70
#define KBASE_GPUPROP_COHERENCY_GROUP_7 71
#define KBASE_GPUPROP_COHERENCY_GROUP_8 72
#define KBASE_GPUPROP_COHERENCY_GROUP_9 73
#define KBASE_GPUPROP_COHERENCY_GROUP_10 74
#define KBASE_GPUPROP_COHERENCY_GROUP_11 75
#define KBASE_GPUPROP_COHERENCY_GROUP_12 76
#define KBASE_GPUPROP_COHERENCY_GROUP_13 77
#define KBASE_GPUPROP_COHERENCY_GROUP_14 78
#define KBASE_GPUPROP_COHERENCY_GROUP_15 79
#define KBASE_GPUPROP_COHERENCY_NUM_GROUPS 61
#define KBASE_GPUPROP_COHERENCY_NUM_CORE_GROUPS 62
#define KBASE_GPUPROP_COHERENCY_COHERENCY 63
#define KBASE_GPUPROP_COHERENCY_GROUP_0 64
#define KBASE_GPUPROP_COHERENCY_GROUP_1 65
#define KBASE_GPUPROP_COHERENCY_GROUP_2 66
#define KBASE_GPUPROP_COHERENCY_GROUP_3 67
#define KBASE_GPUPROP_COHERENCY_GROUP_4 68
#define KBASE_GPUPROP_COHERENCY_GROUP_5 69
#define KBASE_GPUPROP_COHERENCY_GROUP_6 70
#define KBASE_GPUPROP_COHERENCY_GROUP_7 71
#define KBASE_GPUPROP_COHERENCY_GROUP_8 72
#define KBASE_GPUPROP_COHERENCY_GROUP_9 73
#define KBASE_GPUPROP_COHERENCY_GROUP_10 74
#define KBASE_GPUPROP_COHERENCY_GROUP_11 75
#define KBASE_GPUPROP_COHERENCY_GROUP_12 76
#define KBASE_GPUPROP_COHERENCY_GROUP_13 77
#define KBASE_GPUPROP_COHERENCY_GROUP_14 78
#define KBASE_GPUPROP_COHERENCY_GROUP_15 79
#define KBASE_GPUPROP_TEXTURE_FEATURES_3 80
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_3 81
#define KBASE_GPUPROP_TEXTURE_FEATURES_3 80
#define KBASE_GPUPROP_RAW_TEXTURE_FEATURES_3 81
#define KBASE_GPUPROP_NUM_EXEC_ENGINES 82
#define KBASE_GPUPROP_NUM_EXEC_ENGINES 82
#define KBASE_GPUPROP_RAW_THREAD_TLS_ALLOC 83
#define KBASE_GPUPROP_TLS_ALLOC 84
#define KBASE_GPUPROP_RAW_GPU_FEATURES 85
#define KBASE_GPUPROP_RAW_THREAD_TLS_ALLOC 83
#define KBASE_GPUPROP_TLS_ALLOC 84
#define KBASE_GPUPROP_RAW_GPU_FEATURES 85
#ifdef __cpluscplus
}
#endif

1
sysdrv/source/kernel/include/uapi/linux/android/binder.h
View File

@@ -319,6 +319,7 @@ enum transaction_flags {
TF_STATUS_CODE = 0x08, /* contents are a 32-bit status code */
TF_ACCEPT_FDS = 0x10, /* allow replies with file descriptors */
TF_CLEAR_BUF = 0x20, /* clear buffer on txn complete */
TF_UPDATE_TXN = 0x40, /* update the outdated pending async txn */
};
struct binder_transaction_data {

2
sysdrv/source/kernel/include/uapi/linux/audit.h
View File

@@ -182,7 +182,7 @@
#define AUDIT_MAX_KEY_LEN 256
#define AUDIT_BITMASK_SIZE 64
#define AUDIT_WORD(nr) ((__u32)((nr)/32))
#define AUDIT_BIT(nr) (1 << ((nr) - AUDIT_WORD(nr)*32))
#define AUDIT_BIT(nr) (1U << ((nr) - AUDIT_WORD(nr)*32))
#define AUDIT_SYSCALL_CLASSES 16
#define AUDIT_CLASS_DIR_WRITE 0

8
sysdrv/source/kernel/include/uapi/linux/bpf.h
View File

@@ -4180,7 +4180,8 @@ struct bpf_sock {
__u32 src_ip4;
__u32 src_ip6[4];
__u32 src_port; /* host byte order */
__u32 dst_port; /* network byte order */
__be16 dst_port; /* network byte order */
__u16 :16; /* zero padding */
__u32 dst_ip4;
__u32 dst_ip6[4];
__u32 state;
@@ -5006,7 +5007,10 @@ struct bpf_pidns_info {
/* User accessible data for SK_LOOKUP programs. Add new fields at the end. */
struct bpf_sk_lookup {
__bpf_md_ptr(struct bpf_sock *, sk); /* Selected socket */
union {
__bpf_md_ptr(struct bpf_sock *, sk); /* Selected socket */
__u64 cookie; /* Non-zero if socket was selected in PROG_TEST_RUN */
};
__u32 family; /* Protocol family (AF_INET, AF_INET6) */
__u32 protocol; /* IP protocol (IPPROTO_TCP, IPPROTO_UDP) */

5
sysdrv/source/kernel/include/uapi/linux/can/error.h
View File

@@ -120,6 +120,9 @@
#define CAN_ERR_TRX_CANL_SHORT_TO_GND 0x70 /* 0111 0000 */
#define CAN_ERR_TRX_CANL_SHORT_TO_CANH 0x80 /* 1000 0000 */
/* controller specific additional information / data[5..7] */
/* data[5] is reserved (do not use) */
/* TX error counter / data[6] */
/* RX error counter / data[7] */
#endif /* _UAPI_CAN_ERROR_H */

28
sysdrv/source/kernel/include/uapi/linux/can/isotp.h
View File

@@ -137,20 +137,16 @@ struct can_isotp_ll_options {
#define CAN_ISOTP_WAIT_TX_DONE 0x400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x800 /* 1-to-N functional addressing */
/* default values */
/* protocol machine default values */
#define CAN_ISOTP_DEFAULT_FLAGS 0
#define CAN_ISOTP_DEFAULT_EXT_ADDRESS 0x00
#define CAN_ISOTP_DEFAULT_PAD_CONTENT 0xCC /* prevent bit-stuffing */
#define CAN_ISOTP_DEFAULT_FRAME_TXTIME 0
#define CAN_ISOTP_DEFAULT_FRAME_TXTIME 50000 /* 50 micro seconds */
#define CAN_ISOTP_DEFAULT_RECV_BS 0
#define CAN_ISOTP_DEFAULT_RECV_STMIN 0x00
#define CAN_ISOTP_DEFAULT_RECV_WFTMAX 0
#define CAN_ISOTP_DEFAULT_LL_MTU CAN_MTU
#define CAN_ISOTP_DEFAULT_LL_TX_DL CAN_MAX_DLEN
#define CAN_ISOTP_DEFAULT_LL_TX_FLAGS 0
/*
* Remark on CAN_ISOTP_DEFAULT_RECV_* values:
*
@@ -162,4 +158,24 @@ struct can_isotp_ll_options {
* consistency and copied directly into the flow control (FC) frame.
*/
/* link layer default values => make use of Classical CAN frames */
#define CAN_ISOTP_DEFAULT_LL_MTU CAN_MTU
#define CAN_ISOTP_DEFAULT_LL_TX_DL CAN_MAX_DLEN
#define CAN_ISOTP_DEFAULT_LL_TX_FLAGS 0
/*
* The CAN_ISOTP_DEFAULT_FRAME_TXTIME has become a non-zero value as
* it only makes sense for isotp implementation tests to run without
* a N_As value. As user space applications usually do not set the
* frame_txtime element of struct can_isotp_options the new in-kernel
* default is very likely overwritten with zero when the sockopt()
* CAN_ISOTP_OPTS is invoked.
* To make sure that a N_As value of zero is only set intentional the
* value '0' is now interpreted as 'do not change the current value'.
* When a frame_txtime of zero is required for testing purposes this
* CAN_ISOTP_FRAME_TXTIME_ZERO u32 value has to be set in frame_txtime.
*/
#define CAN_ISOTP_FRAME_TXTIME_ZERO 0xFFFFFFFF
#endif /* !_UAPI_CAN_ISOTP_H */

2
sysdrv/source/kernel/include/uapi/linux/capability.h
View File

@@ -425,7 +425,7 @@ struct vfs_ns_cap_data {
*/
#define CAP_TO_INDEX(x) ((x) >> 5) /* 1 << 5 == bits in __u32 */
#define CAP_TO_MASK(x) (1 << ((x) & 31)) /* mask for indexed __u32 */
#define CAP_TO_MASK(x) (1U << ((x) & 31)) /* mask for indexed __u32 */
#endif /* _UAPI_LINUX_CAPABILITY_H */

4
sysdrv/source/kernel/include/uapi/linux/dma-buf.h
View File

@@ -44,8 +44,8 @@ struct dma_buf_sync {
* between them in actual uapi, they're just different numbers.
*/
#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
struct dma_buf_sync_partial {
__u64 flags;

6
sysdrv/source/kernel/include/uapi/linux/eventpoll.h
View File

@@ -41,6 +41,12 @@
#define EPOLLMSG (__force __poll_t)0x00000400
#define EPOLLRDHUP (__force __poll_t)0x00002000
/*
* Internal flag - wakeup generated by io_uring, used to detect recursion back
* into the io_uring poll handler.
*/
#define EPOLL_URING_WAKE ((__force __poll_t)(1U << 27))
/* Set exclusive wakeup mode for the target file descriptor */
#define EPOLLEXCLUSIVE ((__force __poll_t)(1U << 28))

115
sysdrv/source/kernel/include/uapi/linux/io_uring.h
View File

@@ -42,23 +42,25 @@ struct io_uring_sqe {
__u32 statx_flags;
__u32 fadvise_advice;
__u32 splice_flags;
__u32 rename_flags;
__u32 unlink_flags;
__u32 hardlink_flags;
};
__u64 user_data; /* data to be passed back at completion time */
/* pack this to avoid bogus arm OABI complaints */
union {
struct {
/* pack this to avoid bogus arm OABI complaints */
union {
/* index into fixed buffers, if used */
__u16 buf_index;
/* for grouped buffer selection */
__u16 buf_group;
} __attribute__((packed));
/* personality to use, if used */
__u16 personality;
__s32 splice_fd_in;
};
__u64 __pad2[3];
/* index into fixed buffers, if used */
__u16 buf_index;
/* for grouped buffer selection */
__u16 buf_group;
} __attribute__((packed));
/* personality to use, if used */
__u16 personality;
union {
__s32 splice_fd_in;
__u32 file_index;
};
__u64 __pad2[2];
};
enum {
@@ -132,6 +134,9 @@ enum {
IORING_OP_PROVIDE_BUFFERS,
IORING_OP_REMOVE_BUFFERS,
IORING_OP_TEE,
IORING_OP_SHUTDOWN,
IORING_OP_RENAMEAT,
IORING_OP_UNLINKAT,
/* this goes last, obviously */
IORING_OP_LAST,
@@ -145,14 +150,34 @@ enum {
/*
* sqe->timeout_flags
*/
#define IORING_TIMEOUT_ABS (1U << 0)
#define IORING_TIMEOUT_ABS (1U << 0)
#define IORING_TIMEOUT_UPDATE (1U << 1)
#define IORING_TIMEOUT_BOOTTIME (1U << 2)
#define IORING_TIMEOUT_REALTIME (1U << 3)
#define IORING_LINK_TIMEOUT_UPDATE (1U << 4)
#define IORING_TIMEOUT_CLOCK_MASK (IORING_TIMEOUT_BOOTTIME | IORING_TIMEOUT_REALTIME)
#define IORING_TIMEOUT_UPDATE_MASK (IORING_TIMEOUT_UPDATE | IORING_LINK_TIMEOUT_UPDATE)
/*
* sqe->splice_flags
* extends splice(2) flags
*/
#define SPLICE_F_FD_IN_FIXED (1U << 31) /* the last bit of __u32 */
/*
* POLL_ADD flags. Note that since sqe->poll_events is the flag space, the
* command flags for POLL_ADD are stored in sqe->len.
*
* IORING_POLL_ADD_MULTI Multishot poll. Sets IORING_CQE_F_MORE if
* the poll handler will continue to report
* CQEs on behalf of the same SQE.
*
* IORING_POLL_UPDATE Update existing poll request, matching
* sqe->addr as the old user_data field.
*/
#define IORING_POLL_ADD_MULTI (1U << 0)
#define IORING_POLL_UPDATE_EVENTS (1U << 1)
#define IORING_POLL_UPDATE_USER_DATA (1U << 2)
/*
* IO completion data structure (Completion Queue Entry)
*/
@@ -166,8 +191,10 @@ struct io_uring_cqe {
* cqe->flags
*
* IORING_CQE_F_BUFFER If set, the upper 16 bits are the buffer ID
* IORING_CQE_F_MORE If set, parent SQE will generate more CQE entries
*/
#define IORING_CQE_F_BUFFER (1U << 0)
#define IORING_CQE_F_MORE (1U << 1)
enum {
IORING_CQE_BUFFER_SHIFT = 16,
@@ -226,6 +253,7 @@ struct io_cqring_offsets {
#define IORING_ENTER_GETEVENTS (1U << 0)
#define IORING_ENTER_SQ_WAKEUP (1U << 1)
#define IORING_ENTER_SQ_WAIT (1U << 2)
#define IORING_ENTER_EXT_ARG (1U << 3)
/*
* Passed in for io_uring_setup(2). Copied back with updated info on success
@@ -253,6 +281,10 @@ struct io_uring_params {
#define IORING_FEAT_CUR_PERSONALITY (1U << 4)
#define IORING_FEAT_FAST_POLL (1U << 5)
#define IORING_FEAT_POLL_32BITS (1U << 6)
#define IORING_FEAT_SQPOLL_NONFIXED (1U << 7)
#define IORING_FEAT_EXT_ARG (1U << 8)
#define IORING_FEAT_NATIVE_WORKERS (1U << 9)
#define IORING_FEAT_RSRC_TAGS (1U << 10)
/*
* io_uring_register(2) opcodes and arguments
@@ -272,16 +304,62 @@ enum {
IORING_REGISTER_RESTRICTIONS = 11,
IORING_REGISTER_ENABLE_RINGS = 12,
/* extended with tagging */
IORING_REGISTER_FILES2 = 13,
IORING_REGISTER_FILES_UPDATE2 = 14,
IORING_REGISTER_BUFFERS2 = 15,
IORING_REGISTER_BUFFERS_UPDATE = 16,
/* set/clear io-wq thread affinities */
IORING_REGISTER_IOWQ_AFF = 17,
IORING_UNREGISTER_IOWQ_AFF = 18,
/* set/get max number of io-wq workers */
IORING_REGISTER_IOWQ_MAX_WORKERS = 19,
/* this goes last */
IORING_REGISTER_LAST
};
/* io-wq worker categories */
enum {
IO_WQ_BOUND,
IO_WQ_UNBOUND,
};
/* deprecated, see struct io_uring_rsrc_update */
struct io_uring_files_update {
__u32 offset;
__u32 resv;
__aligned_u64 /* __s32 * */ fds;
};
struct io_uring_rsrc_register {
__u32 nr;
__u32 resv;
__u64 resv2;
__aligned_u64 data;
__aligned_u64 tags;
};
struct io_uring_rsrc_update {
__u32 offset;
__u32 resv;
__aligned_u64 data;
};
struct io_uring_rsrc_update2 {
__u32 offset;
__u32 resv;
__aligned_u64 data;
__aligned_u64 tags;
__u32 nr;
__u32 resv2;
};
/* Skip updating fd indexes set to this value in the fd table */
#define IORING_REGISTER_FILES_SKIP (-2)
#define IO_URING_OP_SUPPORTED (1U << 0)
struct io_uring_probe_op {
@@ -329,4 +407,11 @@ enum {
IORING_RESTRICTION_LAST
};
struct io_uring_getevents_arg {
__u64 sigmask;
__u32 sigmask_sz;
__u32 pad;
__u64 ts;
};
#endif

10
sysdrv/source/kernel/include/uapi/linux/ip.h
View File

@@ -100,8 +100,14 @@ struct iphdr {
__u8 ttl;
__u8 protocol;
__sum16 check;
__be32 saddr;
__be32 daddr;
#ifndef __GENKSYMS__
__struct_group(/* no tag */, addrs, /* no attrs */,
#endif
__be32 saddr;
__be32 daddr;
#ifndef __GENKSYMS__
);
#endif
/*The options start here. */
};

10
sysdrv/source/kernel/include/uapi/linux/ipv6.h
View File

@@ -130,8 +130,14 @@ struct ipv6hdr {
__u8 nexthdr;
__u8 hop_limit;
struct in6_addr saddr;
struct in6_addr daddr;
#ifndef __GENKSYMS__
__struct_group(/* no tag */, addrs, /* no attrs */,
#endif
struct in6_addr saddr;
struct in6_addr daddr;
#ifndef __GENKSYMS__
);
#endif
};

1
sysdrv/source/kernel/include/uapi/linux/media-bus-format.h
View File

@@ -67,6 +67,7 @@
#define MEDIA_BUS_FMT_BGR888_DUMMY_4X8 0x1020
#define MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG 0x1022
#define MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA 0x1023
#define MEDIA_BUS_FMT_RGB666_3X6 0x1100
/* YUV (including grey) - next is 0x202e */
#define MEDIA_BUS_FMT_Y8_1X8 0x2001

17
sysdrv/source/kernel/include/uapi/linux/netfilter/xt_IDLETIMER.h
View File

@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* linux/include/linux/netfilter/xt_IDLETIMER.h
*
* Header file for Xtables timer target module.
*
* Copyright (C) 2004, 2010 Nokia Corporation
@@ -10,20 +9,6 @@
* by Luciano Coelho <luciano.coelho@nokia.com>
*
* Contact: Luciano Coelho <luciano.coelho@nokia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*/
#ifndef _XT_IDLETIMER_H

4
sysdrv/source/kernel/include/uapi/linux/openat2.h
View File

@@ -35,5 +35,9 @@ struct open_how {
#define RESOLVE_IN_ROOT 0x10 /* Make all jumps to "/" and ".."
be scoped inside the dirfd
(similar to chroot(2)). */
#define RESOLVE_CACHED 0x20 /* Only complete if resolution can be
completed through cached lookup. May
return -EAGAIN if that's not
possible. */
#endif /* _UAPI_LINUX_OPENAT2_H */

7
sysdrv/source/kernel/include/uapi/linux/pci_regs.h
View File

@@ -837,6 +837,13 @@
#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
#define PCI_EXT_CAP_PWR_SIZEOF 16
/* Root Complex Event Collector Endpoint Association */
#define PCI_RCEC_RCIEP_BITMAP 4 /* Associated Bitmap for RCiEPs */
#define PCI_RCEC_BUSN 8 /* RCEC Associated Bus Numbers */
#define PCI_RCEC_BUSN_REG_VER 0x02 /* Least version with BUSN present */
#define PCI_RCEC_BUSN_NEXT(x) (((x) >> 8) & 0xff)
#define PCI_RCEC_BUSN_LAST(x) (((x) >> 16) & 0xff)
/* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */
#define PCI_VNDR_HEADER 4 /* Vendor-Specific Header */
#define PCI_VNDR_HEADER_ID(x) ((x) & 0xffff)

76
sysdrv/source/kernel/include/uapi/linux/rk-camera-module.h
View File

@@ -13,7 +13,7 @@
#define RKMODULE_API_VERSION KERNEL_VERSION(0, 1, 0x2)
/* using for rk3588 dual isp unite */
#define RKMOUDLE_UNITE_EXTEND_PIXEL 32
#define RKMOUDLE_UNITE_EXTEND_PIXEL 128
/* using for rv1109 and rv1126 */
#define RKMODULE_EXTEND_LINE 24
@@ -38,6 +38,8 @@
#define RKMODULE_EXTERNAL_MASTER_MODE "external_master"
#define RKMODULE_SLAVE_MODE "slave"
#define RKMODULE_CAMERA_STANDBY_HW "rockchip,camera-module-stb"
/* BT.656 & BT.1120 multi channel
* On which channels it can send video data
* related with struct rkmodule_bt656_mbus_info
@@ -58,6 +60,7 @@
RKMODULE_CAMERA_BT656_CHANNEL_3)
#define DPHY_MAX_LANE 4
#define RKMODULE_MULTI_DEV_NUM 4
#define RKMODULE_GET_MODULE_INFO \
_IOR('V', BASE_VIDIOC_PRIVATE + 0, struct rkmodule_inf)
@@ -170,6 +173,27 @@
#define RKMODULE_GET_READOUT_LINE_CNT_PER_LINE \
_IOR('V', BASE_VIDIOC_PRIVATE + 36, __u32)
#define RKMODULE_GET_GROUP_ID \
_IOR('V', BASE_VIDIOC_PRIVATE + 37, __u32)
#define RKMODULE_SET_GROUP_ID \
_IOW('V', BASE_VIDIOC_PRIVATE + 38, __u32)
#define RKMODULE_GET_CAPTURE_MODE \
_IOR('V', BASE_VIDIOC_PRIVATE + 39, struct rkmodule_capture_info)
#define RKMODULE_SET_CAPTURE_MODE \
_IOW('V', BASE_VIDIOC_PRIVATE + 40, struct rkmodule_capture_info)
#define RKMODULE_GET_SKIP_FRAME \
_IOR('V', BASE_VIDIOC_PRIVATE + 41, __u32)
#define RKMODULE_GET_DSI_MODE \
_IOR('V', BASE_VIDIOC_PRIVATE + 42, __u32)
#define RKCIS_CMD_FLASH_LIGHT_CTRL \
_IOW('V', BASE_VIDIOC_PRIVATE + 43, struct rk_light_param)
struct rkmodule_i2cdev_info {
u8 slave_addr;
} __attribute__ ((packed));
@@ -313,6 +337,7 @@ struct rkmodule_pdaf_inf {
__u32 dccmap_height;
__u32 dcc_mode;
__u32 dcc_dir;
__u32 pd_offset;
__u16 gainmap[RKMODULE_PADF_GAINMAP_LEN];
__u16 dccmap[RKMODULE_PDAF_DCCMAP_LEN];
} __attribute__ ((packed));
@@ -624,6 +649,7 @@ enum rkmodule_reset_src {
RKICF_RESET_SRC_ERR_CUTOFF,
RKCIF_RESET_SRC_ERR_HOTPLUG,
RKCIF_RESET_SRC_ERR_APP,
RKCIF_RESET_SRC_ERR_ISP,
};
struct rkmodule_vicap_reset_info {
@@ -760,4 +786,52 @@ struct rkmodule_sensor_infos {
struct rkmodule_sensor_fmt sensor_fmt[RKMODULE_MAX_SENSOR_NUM];
};
enum rkmodule_capture_mode {
RKMODULE_CAPTURE_MODE_NONE = 0,
RKMODULE_MULTI_DEV_COMBINE_ONE,
RKMODULE_ONE_CH_TO_MULTI_ISP,
RKMODULE_MULTI_CH_TO_MULTI_ISP,
RKMODULE_MULTI_CH_COMBINE_SQUARE,
};
struct rkmodule_multi_dev_info {
__u32 dev_idx[RKMODULE_MULTI_DEV_NUM];
__u32 combine_idx[RKMODULE_MULTI_DEV_NUM];
__u32 pixel_offset;
__u32 dev_num;
__u32 reserved[8];
};
struct rkmodule_one_to_multi_info {
__u32 isp_num;
__u32 frame_pattern[RKMODULE_MULTI_DEV_NUM];
};
struct rkmodule_multi_combine_info {
__u32 combine_num;
__u32 combine_index[RKMODULE_MULTI_DEV_NUM];
};
struct rkmodule_capture_info {
__u32 mode;
union {
struct rkmodule_multi_dev_info multi_dev;
struct rkmodule_one_to_multi_info one_to_multi;
struct rkmodule_multi_combine_info multi_combine_info;
};
};
enum rk_light_type {
LIGHT_PWM,
LIGHT_GPIO,
};
struct rk_light_param {
__u8 light_type;
__u8 light_enable;
__u64 duty_cycle;
__u64 period;
__u32 polarity;
} __attribute__ ((packed));
#endif /* _UAPI_RKMODULE_CAMERA_H */

8
sysdrv/source/kernel/include/uapi/linux/rkisp1-config.h → sysdrv/source/kernel/include/uapi/linux/rk-isp1-config.h
View File

@@ -4,12 +4,12 @@
* Copyright (C) 2017 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISP1_CONFIG_H
#define _UAPI_RKISP1_CONFIG_H
#ifndef _UAPI_RK_ISP1_CONFIG_H
#define _UAPI_RK_ISP1_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#include "rkisp21-config.h"
#include "rk-isp21-config.h"
#define CIFISP_MODULE_DPCC (1 << 0)
#define CIFISP_MODULE_BLS (1 << 1)
@@ -869,4 +869,4 @@ struct rkisp1_stat_buffer {
struct cifisp_stat params;
} __attribute__ ((packed));
#endif /* _UAPI_RKISP1_CONFIG_H */
#endif /* _UAPI_RK_ISP1_CONFIG_H */

68
sysdrv/source/kernel/include/uapi/linux/rkisp2-config.h → sysdrv/source/kernel/include/uapi/linux/rk-isp2-config.h
View File

@@ -4,13 +4,13 @@
* Copyright (C) 2017 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISP2_CONFIG_H
#define _UAPI_RKISP2_CONFIG_H
#ifndef _UAPI_RK_ISP2_CONFIG_H
#define _UAPI_RK_ISP2_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#define RKISP_API_VERSION KERNEL_VERSION(2, 0, 0)
#define RKISP_API_VERSION KERNEL_VERSION(2, 5, 0)
/****************ISP SUBDEV IOCTL*****************************/
@@ -51,11 +51,15 @@
_IOW('V', BASE_VIDIOC_PRIVATE + 11, long long)
/* BASE_VIDIOC_PRIVATE + 12 for RKISP_CMD_GET_TB_HEAD_V32 */
/* BASE_VIDIOC_PRIVATE + 14 for RKISP_CMD_SET_TB_HEAD_V32 */
/* for all isp device stop and no power off but resolution change */
#define RKISP_CMD_MULTI_DEV_FORCE_ENUM \
_IO('V', BASE_VIDIOC_PRIVATE + 13)
#define RKISP_CMD_GET_BAY3D_BUFFD \
_IOR('V', BASE_VIDIOC_PRIVATE + 15, struct rkisp_bay3dbuf_info)
/****************ISP VIDEO IOCTL******************************/
#define RKISP_CMD_GET_CSI_MEMORY_MODE \
@@ -96,6 +100,9 @@
#define RKISP_CMD_FREE_TB_STREAM_BUF \
_IO('V', BASE_VIDIOC_PRIVATE + 112)
#define RKISP_CMD_SET_IQTOOL_CONN_ID \
_IOW('V', BASE_VIDIOC_PRIVATE + 113, int)
/*************************************************************/
#define ISP2X_ID_DPCC (0)
@@ -313,6 +320,23 @@ struct isp2x_mesh_head {
u32 data_oft;
} __attribute__ ((packed));
struct rkisp_bay3dbuf_info {
int iir_fd;
int iir_size;
union {
struct {
int cur_fd;
int cur_size;
int ds_fd;
int ds_size;
} v30;
struct {
int ds_fd;
int ds_size;
} v32;
} u;
} __attribute__ ((packed));
#define RKISP_CMSK_WIN_MAX 12
#define RKISP_CMSK_WIN_MAX_V30 8
#define RKISP_CMSK_MOSAIC_MODE 0
@@ -375,6 +399,7 @@ struct rkisp_stream_info {
unsigned int input_frame_loss;
unsigned int output_frame_loss;
unsigned char stream_on;
unsigned char stream_id;
} __attribute__ ((packed));
/* struct rkisp_mirror_flip
@@ -1963,22 +1988,35 @@ struct rkisp_isp2x_luma_buffer {
struct rkisp_mipi_luma luma[ISP2X_MIPI_RAW_MAX];
} __attribute__ ((packed));
enum {
RKISP_RTT_MODE_NORMAL = 0,
RKISP_RTT_MODE_MULTI_FRAME,
RKISP_RTT_MODE_ONE_FRAME,
};
/**
* struct rkisp_thunderboot_resmem_head
*/
struct rkisp_thunderboot_resmem_head {
u16 enable;
u16 complete;
u16 frm_total;
u16 hdr_mode;
u16 width;
u16 height;
u32 bus_fmt;
__u16 enable;
__u16 complete;
__u16 frm_total;
__u16 hdr_mode;
__u16 rtt_mode;
__u16 width;
__u16 height;
__u16 camera_num;
__u16 camera_index;
__u16 md_flag;
u32 exp_time[3];
u32 exp_gain[3];
u32 exp_time_reg[3];
u32 exp_gain_reg[3];
__u32 exp_time[3];
__u32 exp_gain[3];
__u32 exp_time_reg[3];
__u32 exp_gain_reg[3];
__u32 exp_isp_dgain[3];
__u32 dcg_mode[3];
__u32 nr_buf_size;
__u32 share_mem_size;
} __attribute__ ((packed));
/**
@@ -1998,4 +2036,4 @@ struct rkisp_thunderboot_shmem {
s32 shm_fd;
} __attribute__ ((packed));
#endif /* _UAPI_RKISP2_CONFIG_H */
#endif /* _UAPI_RK_ISP2_CONFIG_H */

9
sysdrv/source/kernel/include/uapi/linux/rkisp21-config.h → sysdrv/source/kernel/include/uapi/linux/rk-isp21-config.h
View File

@@ -4,12 +4,12 @@
* Copyright (C) 2020 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISP21_CONFIG_H
#define _UAPI_RKISP21_CONFIG_H
#ifndef _UAPI_RK_ISP21_CONFIG_H
#define _UAPI_RK_ISP21_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#include <linux/rkisp2-config.h>
#include <linux/rk-isp2-config.h>
#define ISP2X_MODULE_BAYNR BIT_ULL(36)
#define ISP2X_MODULE_BAY3D BIT_ULL(37)
@@ -805,7 +805,8 @@ struct isp21_stat {
struct rkisp_isp21_stat_buffer {
unsigned int meas_type;
unsigned int frame_id;
unsigned int params_id;
struct isp21_stat params;
} __attribute__ ((packed));
#endif /* _UAPI_RKISP21_CONFIG_H */
#endif /* _UAPI_RK_ISP21_CONFIG_H */

9
sysdrv/source/kernel/include/uapi/linux/rkisp3-config.h → sysdrv/source/kernel/include/uapi/linux/rk-isp3-config.h
View File

@@ -4,12 +4,12 @@
* Copyright (C) 2021 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISP3_CONFIG_H
#define _UAPI_RKISP3_CONFIG_H
#ifndef _UAPI_RK_ISP3_CONFIG_H
#define _UAPI_RK_ISP3_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#include <linux/rkisp21-config.h>
#include <linux/rk-isp21-config.h>
#define ISP3X_MODULE_DPCC ISP2X_MODULE_DPCC
#define ISP3X_MODULE_BLS ISP2X_MODULE_BLS
@@ -1070,7 +1070,8 @@ struct isp3x_stat {
struct rkisp3x_isp_stat_buffer {
u32 meas_type;
u32 frame_id;
u32 params_id;
struct isp3x_stat params;
} __attribute__ ((packed));
#endif /* _UAPI_RKISP3_CONFIG_H */
#endif /* _UAPI_RK_ISP3_CONFIG_H */

136
sysdrv/source/kernel/include/uapi/linux/rkisp32-config.h → sysdrv/source/kernel/include/uapi/linux/rk-isp32-config.h
View File

@@ -4,16 +4,19 @@
* Copyright (C) 2022 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISP32_CONFIG_H
#define _UAPI_RKISP32_CONFIG_H
#ifndef _UAPI_RK_ISP32_CONFIG_H
#define _UAPI_RK_ISP32_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#include <linux/rkisp3-config.h>
#include <linux/rk-isp3-config.h>
#define RKISP_CMD_GET_TB_HEAD_V32 \
_IOR('V', BASE_VIDIOC_PRIVATE + 12, struct rkisp32_thunderboot_resmem_head)
#define RKISP_CMD_SET_TB_HEAD_V32 \
_IOW('V', BASE_VIDIOC_PRIVATE + 14, struct rkisp32_thunderboot_resmem_head)
#define ISP32_MODULE_DPCC ISP3X_MODULE_DPCC
#define ISP32_MODULE_BLS ISP3X_MODULE_BLS
#define ISP32_MODULE_SDG ISP3X_MODULE_SDG
@@ -52,7 +55,7 @@
#define ISP32_MODULE_CSM ISP3X_MODULE_CSM
#define ISP32_MODULE_CGC ISP3X_MODULE_CGC
#define ISP32_MODULE_VSM BIT_ULL(45)
#define ISP32_MODULE_RTT_FST BIT_ULL(62)
#define ISP32_MODULE_FORCE ISP3X_MODULE_FORCE
/* Measurement types */
@@ -70,6 +73,7 @@
#define ISP32_STAT_DHAZ ISP3X_STAT_DHAZ
#define ISP32_STAT_VSM BIT(18)
#define ISP32_STAT_INFO2DDR BIT(19)
#define ISP32_STAT_RTT_FST BIT(31)
#define ISP32_MESH_BUF_NUM ISP3X_MESH_BUF_NUM
@@ -87,6 +91,9 @@
#define ISP32_RAWAWB_WEIGHT_NUM ISP3X_RAWAWB_WEIGHT_NUM
#define ISP32_RAWAWB_SUM_NUM 4
#define ISP32_RAWAWB_RAMDATA_NUM ISP3X_RAWAWB_RAMDATA_NUM
#define ISP32L_RAWAWB_WEIGHT_NUM 5
#define ISP32L_RAWAWB_RAMDATA_RGB_NUM 25
#define ISP32L_RAWAWB_RAMDATA_WP_NUM 13
#define ISP32_RAWAEBIG_SUBWIN_NUM ISP3X_RAWAEBIG_SUBWIN_NUM
#define ISP32_RAWAEBIG_MEAN_NUM ISP3X_RAWAEBIG_MEAN_NUM
@@ -95,6 +102,7 @@
#define ISP32_RAWHISTBIG_SUBWIN_NUM ISP3X_RAWHISTBIG_SUBWIN_NUM
#define ISP32_RAWHISTLITE_SUBWIN_NUM ISP3X_RAWHISTLITE_SUBWIN_NUM
#define ISP32_HIST_BIN_N_MAX ISP3X_HIST_BIN_N_MAX
#define ISP32L_HIST_LITE_BIN_N_MAX 64
#define ISP32_RAWAF_CURVE_NUM ISP3X_RAWAF_CURVE_NUM
#define ISP32_RAWAF_HIIR_COE_NUM ISP3X_RAWAF_HIIR_COE_NUM
@@ -105,6 +113,7 @@
#define ISP32_RAWAF_SUMDATA_NUM ISP3X_RAWAF_SUMDATA_NUM
#define ISP32_RAWAF_VIIR_COE_NUM 3
#define ISP32_RAWAF_GAUS_COE_NUM 9
#define ISP32L_RAWAF_WND_DATA 25
#define ISP32_DPCC_PDAF_POINT_NUM ISP3X_DPCC_PDAF_POINT_NUM
@@ -380,6 +389,11 @@ struct isp32_bay3d_cfg {
u8 higaus3_mode;
u8 higaus5x5_en;
u8 wgtmix_opt_en;
/* for isp32_lite */
u8 wgtmm_opt_en;
u8 wgtmm_sel_en;
/* BAY3D_SIGGAUS */
u8 siggaus0;
u8 siggaus1;
@@ -398,6 +412,10 @@ struct isp32_bay3d_cfg {
u16 sig1_y[ISP32_BAY3D_XY_NUM];
u16 sig2_x[ISP32_BAY3D_XY_NUM];
u16 sig2_y[ISP32_BAY3D_XY_NUM];
/* LODIF_STAT1 for isp32_lite */
u16 wgtmin;
/* BAY3D_HISIGRAT */
u16 hisigrat0;
u16 hisigrat1;
@@ -432,6 +450,9 @@ struct isp32_ynr_cfg {
/* YNR_NLM_COE */
u8 nlm_coe[ISP32_YNR_NLM_COE_NUM];
/* LOWNR_CTRL4 for isp32_lite */
u8 frame_add4line;
u16 global_gain;
/* YNR_RNR_MAX_R */
@@ -539,6 +560,11 @@ struct isp32_sharp_cfg {
u8 exgain_bypass;
u8 radius_ds_mode;
u8 noiseclip_mode;
/* for isp32_lite */
u8 clip_hf_mode;
u8 add_mode;
/* SHARP_RATIO */
u8 sharp_ratio;
u8 bf_ratio;
@@ -582,6 +608,11 @@ struct isp32_sharp_cfg {
/* SHARP_TEXTURE */
u16 noise_sigma;
u16 noise_strength;
/* EHF_TH for isp32_lite */
u16 ehf_th[ISP32_SHARP_Y_NUM];
/* CLIP_NEG for isp32_lite */
u16 clip_neg[ISP32_SHARP_Y_NUM];
} __attribute__ ((packed));
struct isp32_dhaz_cfg {
@@ -861,6 +892,10 @@ struct isp32_rawawb_meas_cfg {
u8 blk_measure_xytype;
u8 blk_rtdw_measure_en;
u8 blk_measure_illu_idx;
/* for isp32_lite */
u8 ds16x8_mode_en;
u8 blk_with_luma_wei_en;
u16 in_overexposure_threshold;
/* RAWAWB_LIMIT_RG_MAX*/
@@ -1138,12 +1173,17 @@ struct isp32_rawawb_meas_cfg {
u32 islope23_3;
u32 islope30_3;
/* WIN_WEIGHT for isp32_lite */
u32 win_weight[ISP32L_RAWAWB_WEIGHT_NUM];
struct isp2x_bls_fixed_val bls2_val;
} __attribute__ ((packed));
struct isp32_rawaf_meas_cfg {
u8 rawaf_sel;
u8 num_afm_win;
/* for isp32_lite */
u8 bnr2af_sel;
/* CTRL */
u8 gamma_en;
u8 gaus_en;
@@ -1164,6 +1204,23 @@ struct isp32_rawaf_meas_cfg {
u8 from_awb;
u8 from_ynr;
u8 ae_config_use;
/* for isp32_lite */
u8 ae_sel;
/* for isp32_lite */
u8 hiir_left_border_mode;
u8 avg_ds_en;
u8 avg_ds_mode;
u8 h1_acc_mode;
u8 h2_acc_mode;
u8 v1_acc_mode;
u8 v2_acc_mode;
/* CTRL1 for isp32_lite */
s16 bls_offset;
u8 bls_en;
u8 hldg_dilate_num;
/* WINA_B */
struct isp2x_window win[ISP32_RAWAF_WIN_NUM];
/* INT_LINE */
@@ -1174,6 +1231,9 @@ struct isp32_rawaf_meas_cfg {
/* VAR_SHIFT */
u8 afm_var_shift[ISP32_RAWAF_WIN_NUM];
u8 lum_var_shift[ISP32_RAWAF_WIN_NUM];
/* for isp32_lite */
u8 tnrin_shift;
/* HVIIR_VAR_SHIFT */
u8 h1iir_var_shift;
u8 h2iir_var_shift;
@@ -1198,6 +1258,13 @@ struct isp32_rawaf_meas_cfg {
s16 v1fir_coe[ISP32_RAWAF_VFIR_COE_NUM];
s16 v2fir_coe[ISP32_RAWAF_VFIR_COE_NUM];
u16 highlit_thresh;
/* CORING_H for isp32_lite */
u16 h_fv_limit;
u16 h_fv_slope;
/* CORING_V for isp32_lite */
u16 v_fv_limit;
u16 v_fv_slope;
} __attribute__ ((packed));
struct isp32_cac_cfg {
@@ -1398,10 +1465,67 @@ struct rkisp32_isp_stat_buffer {
struct isp32_stat params;
u32 meas_type;
u32 frame_id;
u32 params_id;
} __attribute__ ((packed));
struct rkisp32_thunderboot_resmem_head {
struct rkisp_thunderboot_resmem_head head;
struct isp32_isp_params_cfg cfg;
};
#endif /* _UAPI_RKISP32_CONFIG_H */
} __attribute__ ((packed));
/****************isp32 lite********************/
struct isp32_lite_rawaebig_stat {
u32 sumr;
u32 sumg;
u32 sumb;
struct isp2x_rawae_meas_data data[ISP32_RAWAEBIG_MEAN_NUM];
} __attribute__ ((packed));
struct isp32_lite_rawawb_meas_stat {
u32 ramdata_r[ISP32L_RAWAWB_RAMDATA_RGB_NUM];
u32 ramdata_g[ISP32L_RAWAWB_RAMDATA_RGB_NUM];
u32 ramdata_b[ISP32L_RAWAWB_RAMDATA_RGB_NUM];
u32 ramdata_wpnum0[ISP32L_RAWAWB_RAMDATA_WP_NUM];
u32 ramdata_wpnum1[ISP32L_RAWAWB_RAMDATA_WP_NUM];
struct isp32_rawawb_sum sum[ISP32_RAWAWB_SUM_NUM];
u16 yhist_bin[ISP32_RAWAWB_HSTBIN_NUM];
struct isp32_rawawb_sum_exc sum_exc[ISP32_RAWAWB_EXCL_STAT_NUM];
} __attribute__ ((packed));
struct isp32_lite_rawaf_ramdata {
u32 hiir_wnd_data[ISP32L_RAWAF_WND_DATA];
u32 viir_wnd_data[ISP32L_RAWAF_WND_DATA];
} __attribute__ ((packed));
struct isp32_lite_rawaf_stat {
struct isp32_lite_rawaf_ramdata ramdata;
u32 int_state;
u32 afm_sum_b;
u32 afm_lum_b;
u32 highlit_cnt_winb;
} __attribute__ ((packed));
struct isp32_lite_rawhistlite_stat {
u32 hist_bin[ISP32L_HIST_LITE_BIN_N_MAX];
} __attribute__ ((packed));
struct isp32_lite_stat {
struct isp2x_bls_stat bls;
struct isp3x_dhaz_stat dhaz;
struct isp32_info2ddr_stat info2ddr;
struct isp2x_rawaelite_stat rawae0;
struct isp32_lite_rawaebig_stat rawae3;
struct isp32_lite_rawhistlite_stat rawhist0;
struct isp2x_rawhistbig_stat rawhist3;
struct isp32_lite_rawaf_stat rawaf;
struct isp32_lite_rawawb_meas_stat rawawb;
} __attribute__ ((packed));
struct rkisp32_lite_stat_buffer {
struct isp32_lite_stat params;
u32 meas_type;
u32 frame_id;
u32 params_id;
} __attribute__ ((packed));
#endif /* _UAPI_RK_ISP32_CONFIG_H */

10
sysdrv/source/kernel/include/uapi/linux/rkispp-config.h → sysdrv/source/kernel/include/uapi/linux/rk-ispp-config.h
View File

@@ -3,8 +3,8 @@
* Copyright (C) 2019 Rockchip Electronics Co., Ltd.
*/
#ifndef _UAPI_RKISPP_CONFIG_H
#define _UAPI_RKISPP_CONFIG_H
#ifndef _UAPI_RK_ISPP_CONFIG_H
#define _UAPI_RK_ISPP_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
@@ -114,8 +114,10 @@
(V4L2_EVENT_PRIVATE_START + 3)
struct rkispp_fec_in_out {
int width;
int height;
int in_width;
int in_height;
int out_width;
int out_height;
int in_fourcc;
int out_fourcc;
int in_pic_fd;

47
sysdrv/source/kernel/include/uapi/linux/rk-pcie-ep.h
View File

@@ -8,19 +8,66 @@
#include <linux/types.h>
/*
* rockchip pcie driver elbi ioctrl output data
*/
struct pcie_ep_user_data {
__u64 bar0_phys_addr;
__u32 elbi_app_user[11];
};
/*
* rockchip driver cache ioctrl input param
*/
struct pcie_ep_dma_cache_cfg {
__u64 addr;
__u32 size;
};
#define PCIE_EP_OBJ_INFO_MAGIC 0x524B4550
enum pcie_ep_obj_irq_type {
OBJ_IRQ_UNKNOWN,
OBJ_IRQ_DMA,
OBJ_IRQ_USER,
OBJ_IRQ_ELBI,
};
struct pcie_ep_obj_irq_dma_status {
__u32 wr;
__u32 rd;
};
enum pcie_ep_mmap_resource {
PCIE_EP_MMAP_RESOURCE_DBI,
PCIE_EP_MMAP_RESOURCE_BAR0,
PCIE_EP_MMAP_RESOURCE_BAR2,
PCIE_EP_MMAP_RESOURCE_BAR4,
PCIE_EP_MMAP_RESOURCE_MAX,
};
/*
* rockchip ep device information which is store in BAR0
*/
struct pcie_ep_obj_info {
__u32 magic;
__u32 version;
__u8 reserved[0x1F8];
__u32 irq_type_rc; /* Generate in ep isr, valid only for rc, clear in rc */
struct pcie_ep_obj_irq_dma_status dma_status_rc; /* Generate in ep isr, valid only for rc, clear in rc */
__u32 irq_type_ep; /* Generate in ep isr, valid only for ep, clear in ep */
struct pcie_ep_obj_irq_dma_status dma_status_ep; /* Generate in ep isr, valid only for ep, clear in ep */
__u32 obj_irq_user_data; /* OBJ_IRQ_USER userspace data */
};
#define PCIE_BASE 'P'
#define PCIE_DMA_GET_ELBI_DATA _IOR(PCIE_BASE, 0, struct pcie_ep_user_data)
#define PCIE_DMA_CACHE_INVALIDE _IOW(PCIE_BASE, 1, struct pcie_ep_dma_cache_cfg)
#define PCIE_DMA_CACHE_FLUSH _IOW(PCIE_BASE, 2, struct pcie_ep_dma_cache_cfg)
#define PCIE_DMA_IRQ_MASK_ALL _IOW(PCIE_BASE, 3, int)
#define PCIE_DMA_RAISE_MSI_OBJ_IRQ_USER _IOW(PCIE_BASE, 4, int)
#define PCIE_EP_GET_USER_INFO _IOR(PCIE_BASE, 5, struct pcie_ep_user_data)
#define PCIE_EP_SET_MMAP_RESOURCE _IOW(PCIE_BASE, 6, enum pcie_ep_mmap_resource)
#endif

6
sysdrv/source/kernel/include/uapi/linux/rk_hdmirx_config.h
View File

@@ -34,14 +34,14 @@ enum hdmirx_color_range {
HDMIRX_FULL_RANGE = 2,
};
enum hdmirx_video_standard {
enum hdmirx_color_space {
HDMIRX_XVYCC601 = 0,
HDMIRX_XVYCC709 = 1,
HDMIRX_SYCC601 = 2,
HDMIRX_ADOBE_YCC601 = 3,
HDMIRX_ADOBE_RGB = 4,
HDMIRX_BT2020 = 5,
HDMIRX_BT2020_RGB = 6,
HDMIRX_BT2020_YCC_CONST_LUM = 5,
HDMIRX_BT2020_RGB_OR_YCC = 6,
};
/* Private v4l2 ioctl */

24
sysdrv/source/kernel/include/uapi/linux/rkcif-config.h
View File

@@ -9,7 +9,9 @@
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#define RKCIF_API_VERSION KERNEL_VERSION(0, 1, 0xa)
#define RKCIF_MAX_CSI_NUM 4
#define RKCIF_API_VERSION KERNEL_VERSION(0, 2, 0)
#define V4L2_EVENT_RESET_DEV 0X1001
@@ -32,7 +34,13 @@
_IOW('V', BASE_VIDIOC_PRIVATE + 6, int)
#define RKCIF_CMD_SET_CSI_IDX \
_IOW('V', BASE_VIDIOC_PRIVATE + 7, unsigned int)
_IOW('V', BASE_VIDIOC_PRIVATE + 7, struct rkcif_csi_info)
#define RKCIF_CMD_SET_QUICK_STREAM \
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct rkcif_quick_stream_param)
#define RKCIF_CMD_START_CAPTURE_ONE_FRAME_AOV \
_IOW('V', BASE_VIDIOC_PRIVATE + 9, int)
/* cif memory mode
* 0: raw12/raw10/raw8 8bit memory compact
@@ -71,4 +79,16 @@ struct rkcif_fps {
int fps;
};
struct rkcif_csi_info {
int csi_num;
int csi_idx[RKCIF_MAX_CSI_NUM];
int dphy_vendor[RKCIF_MAX_CSI_NUM];
};
struct rkcif_quick_stream_param {
int on;
__u32 frame_num;
int resume_mode;
};
#endif

25
sysdrv/source/kernel/include/uapi/linux/stddef.h
View File

@@ -1,6 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _UAPI_LINUX_STDDEF_H
#define _UAPI_LINUX_STDDEF_H
#include <linux/compiler_types.h>
#ifndef __always_inline
#define __always_inline inline
#endif
/**
* __struct_group() - Create a mirrored named and anonyomous struct
*
* @TAG: The tag name for the named sub-struct (usually empty)
* @NAME: The identifier name of the mirrored sub-struct
* @ATTRS: Any struct attributes (usually empty)
* @MEMBERS: The member declarations for the mirrored structs
*
* Used to create an anonymous union of two structs with identical layout
* and size: one anonymous and one named. The former's members can be used
* normally without sub-struct naming, and the latter can be used to
* reason about the start, end, and size of the group of struct members.
* The named struct can also be explicitly tagged for layer reuse, as well
* as both having struct attributes appended.
*/
#define __struct_group(TAG, NAME, ATTRS, MEMBERS...) \
union { \
struct { MEMBERS } ATTRS; \
struct TAG { MEMBERS } ATTRS NAME; \
}
#endif

3
sysdrv/source/kernel/include/uapi/linux/videodev2.h
View File

@@ -1556,7 +1556,8 @@ struct v4l2_bt_timings {
((bt)->width + V4L2_DV_BT_BLANKING_WIDTH(bt))
#define V4L2_DV_BT_BLANKING_HEIGHT(bt) \
((bt)->vfrontporch + (bt)->vsync + (bt)->vbackporch + \
(bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch)
((bt)->interlaced ? \
((bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch) : 0))
#define V4L2_DV_BT_FRAME_HEIGHT(bt) \
((bt)->height + V4L2_DV_BT_BLANKING_HEIGHT(bt))

3
sysdrv/source/kernel/include/uapi/sound/asound.h
View File

@@ -614,7 +614,8 @@ enum {
SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, /* monotonic_raw (no NTP) */
SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW,
SNDRV_PCM_TSTAMP_TYPE_BOOTTIME, /* boot time during suspend */
SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_BOOTTIME,
};
/* channel positions */