mirror of
https://github.com/LuckfoxTECH/luckfox-pico.git
synced 2026-01-19 17:59:18 +01:00
project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
@@ -224,6 +224,7 @@ struct nvme_queue {
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*/
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struct nvme_iod {
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struct nvme_request req;
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struct nvme_command cmd;
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struct nvme_queue *nvmeq;
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bool use_sgl;
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int aborted;
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@@ -816,6 +817,8 @@ static blk_status_t nvme_setup_prp_simple(struct nvme_dev *dev,
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cmnd->dptr.prp1 = cpu_to_le64(iod->first_dma);
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if (bv->bv_len > first_prp_len)
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cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma + first_prp_len);
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else
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cmnd->dptr.prp2 = 0;
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return BLK_STS_OK;
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}
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@@ -917,7 +920,7 @@ static blk_status_t nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
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struct nvme_dev *dev = nvmeq->dev;
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struct request *req = bd->rq;
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struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
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struct nvme_command cmnd;
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struct nvme_command *cmnd = &iod->cmd;
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blk_status_t ret;
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iod->aborted = 0;
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@@ -931,24 +934,24 @@ static blk_status_t nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
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if (unlikely(!test_bit(NVMEQ_ENABLED, &nvmeq->flags)))
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return BLK_STS_IOERR;
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ret = nvme_setup_cmd(ns, req, &cmnd);
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ret = nvme_setup_cmd(ns, req, cmnd);
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if (ret)
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return ret;
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if (blk_rq_nr_phys_segments(req)) {
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ret = nvme_map_data(dev, req, &cmnd);
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ret = nvme_map_data(dev, req, cmnd);
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if (ret)
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goto out_free_cmd;
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}
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if (blk_integrity_rq(req)) {
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ret = nvme_map_metadata(dev, req, &cmnd);
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ret = nvme_map_metadata(dev, req, cmnd);
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if (ret)
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goto out_unmap_data;
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}
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blk_mq_start_request(req);
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nvme_submit_cmd(nvmeq, &cmnd, bd->last);
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nvme_submit_cmd(nvmeq, cmnd, bd->last);
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return BLK_STS_OK;
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out_unmap_data:
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nvme_unmap_data(dev, req);
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@@ -1350,13 +1353,12 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
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req->tag, nvmeq->qid);
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abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd,
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BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
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BLK_MQ_REQ_NOWAIT);
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if (IS_ERR(abort_req)) {
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atomic_inc(&dev->ctrl.abort_limit);
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return BLK_EH_RESET_TIMER;
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}
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abort_req->timeout = ADMIN_TIMEOUT;
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abort_req->end_io_data = NULL;
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blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio);
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@@ -1666,6 +1668,7 @@ static int nvme_alloc_admin_tags(struct nvme_dev *dev)
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dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset);
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if (IS_ERR(dev->ctrl.admin_q)) {
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blk_mq_free_tag_set(&dev->admin_tagset);
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dev->ctrl.admin_q = NULL;
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return -ENOMEM;
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}
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if (!blk_get_queue(dev->ctrl.admin_q)) {
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@@ -2278,11 +2281,10 @@ static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode)
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cmd.delete_queue.opcode = opcode;
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cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid);
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req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
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req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT);
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if (IS_ERR(req))
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return PTR_ERR(req);
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req->timeout = ADMIN_TIMEOUT;
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req->end_io_data = nvmeq;
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init_completion(&nvmeq->delete_done);
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@@ -2624,6 +2626,8 @@ static void nvme_reset_work(struct work_struct *work)
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if (result)
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goto out_unlock;
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dma_set_min_align_mask(dev->dev, NVME_CTRL_PAGE_SIZE - 1);
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/*
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* Limit the max command size to prevent iod->sg allocations going
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* over a single page.
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@@ -2636,7 +2640,6 @@ static void nvme_reset_work(struct work_struct *work)
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* Don't limit the IOMMU merged segment size.
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*/
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dma_set_max_seg_size(dev->dev, 0xffffffff);
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dma_set_min_align_mask(dev->dev, NVME_CTRL_PAGE_SIZE - 1);
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mutex_unlock(&dev->shutdown_lock);
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@@ -3212,7 +3215,10 @@ static const struct pci_device_id nvme_id_table[] = {
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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{ PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */
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.driver_data = NVME_QUIRK_IDENTIFY_CNS |
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NVME_QUIRK_DISABLE_WRITE_ZEROES, },
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NVME_QUIRK_DISABLE_WRITE_ZEROES |
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NVME_QUIRK_BOGUS_NID, },
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{ PCI_VDEVICE(REDHAT, 0x0010), /* Qemu emulated controller */
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.driver_data = NVME_QUIRK_BOGUS_NID, },
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{ PCI_DEVICE(0x126f, 0x2263), /* Silicon Motion unidentified */
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.driver_data = NVME_QUIRK_NO_NS_DESC_LIST, },
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{ PCI_DEVICE(0x1bb1, 0x0100), /* Seagate Nytro Flash Storage */
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@@ -3231,7 +3237,8 @@ static const struct pci_device_id nvme_id_table[] = {
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NVME_QUIRK_DISABLE_WRITE_ZEROES|
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NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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{ PCI_DEVICE(0x1987, 0x5016), /* Phison E16 */
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN |
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NVME_QUIRK_BOGUS_NID, },
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{ PCI_DEVICE(0x1b4b, 0x1092), /* Lexar 256 GB SSD */
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.driver_data = NVME_QUIRK_NO_NS_DESC_LIST |
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NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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@@ -3242,10 +3249,15 @@ static const struct pci_device_id nvme_id_table[] = {
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{ PCI_DEVICE(0x1d1d, 0x2601), /* CNEX Granby */
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.driver_data = NVME_QUIRK_LIGHTNVM, },
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{ PCI_DEVICE(0x10ec, 0x5762), /* ADATA SX6000LNP */
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN |
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NVME_QUIRK_BOGUS_NID, },
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{ PCI_DEVICE(0x1cc1, 0x8201), /* ADATA SX8200PNP 512GB */
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.driver_data = NVME_QUIRK_NO_DEEPEST_PS |
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NVME_QUIRK_IGNORE_DEV_SUBNQN, },
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{ PCI_DEVICE(0x1344, 0x5407), /* Micron Technology Inc NVMe SSD */
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.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN },
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{ PCI_DEVICE(0x1344, 0x6001), /* Micron Nitro NVMe */
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.driver_data = NVME_QUIRK_BOGUS_NID, },
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{ PCI_DEVICE(0x1c5c, 0x1504), /* SK Hynix PC400 */
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.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
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{ PCI_DEVICE(0x15b7, 0x2001), /* Sandisk Skyhawk */
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@@ -3262,7 +3274,6 @@ static const struct pci_device_id nvme_id_table[] = {
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NVME_QUIRK_128_BYTES_SQES |
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NVME_QUIRK_SHARED_TAGS |
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NVME_QUIRK_SKIP_CID_GEN },
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{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
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{ 0, }
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};
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