mirror of
https://github.com/LuckfoxTECH/luckfox-pico.git
synced 2026-01-19 09:52:31 +01:00
project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
@@ -47,11 +47,13 @@
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#include <linux/tick.h>
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#include <trace/events/power.h>
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#include <linux/sched.h>
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#include <linux/sched/smt.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/moduleparam.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/nospec-branch.h>
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#include <asm/mwait.h>
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#include <asm/msr.h>
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@@ -93,6 +95,12 @@ static unsigned int mwait_substates __initdata;
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*/
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#define CPUIDLE_FLAG_ALWAYS_ENABLE BIT(15)
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/*
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* Disable IBRS across idle (when KERNEL_IBRS), is exclusive vs IRQ_ENABLE
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* above.
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*/
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#define CPUIDLE_FLAG_IBRS BIT(16)
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/*
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* MWAIT takes an 8-bit "hint" in EAX "suggesting"
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* the C-state (top nibble) and sub-state (bottom nibble)
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@@ -132,6 +140,24 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev,
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return index;
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}
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static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index)
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{
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bool smt_active = sched_smt_active();
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u64 spec_ctrl = spec_ctrl_current();
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int ret;
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if (smt_active)
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wrmsrl(MSR_IA32_SPEC_CTRL, 0);
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ret = intel_idle(dev, drv, index);
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if (smt_active)
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wrmsrl(MSR_IA32_SPEC_CTRL, spec_ctrl);
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return ret;
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}
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/**
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* intel_idle_s2idle - Ask the processor to enter the given idle state.
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* @dev: cpuidle device of the target CPU.
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@@ -653,7 +679,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
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{
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.name = "C6",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 85,
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.target_residency = 200,
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.enter = &intel_idle,
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@@ -661,7 +687,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
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{
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.name = "C7s",
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.desc = "MWAIT 0x33",
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.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 124,
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.target_residency = 800,
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.enter = &intel_idle,
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@@ -669,7 +695,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
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{
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.name = "C8",
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.desc = "MWAIT 0x40",
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 200,
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.target_residency = 800,
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.enter = &intel_idle,
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@@ -677,7 +703,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
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{
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.name = "C9",
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.desc = "MWAIT 0x50",
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 480,
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.target_residency = 5000,
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.enter = &intel_idle,
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@@ -685,7 +711,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
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{
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.name = "C10",
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.desc = "MWAIT 0x60",
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 890,
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.target_residency = 5000,
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.enter = &intel_idle,
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@@ -714,7 +740,7 @@ static struct cpuidle_state skx_cstates[] __initdata = {
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{
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.name = "C6",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
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.exit_latency = 133,
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.target_residency = 600,
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.enter = &intel_idle,
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@@ -1501,6 +1527,11 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
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/* Structure copy. */
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drv->states[drv->state_count] = cpuidle_state_table[cstate];
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if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) &&
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cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) {
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drv->states[drv->state_count].enter = intel_idle_ibrs;
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}
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if ((disabled_states_mask & BIT(drv->state_count)) ||
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((icpu->use_acpi || force_use_acpi) &&
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intel_idle_off_by_default(mwait_hint) &&
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