mirror of
https://github.com/LuckfoxTECH/luckfox-pico.git
synced 2026-01-19 09:52:31 +01:00
Pullrequest mis5001 clear patch 0305 (#242)
* project/app : Add uvc_app_tiny application Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC/overlay : Add Ubuntu system support for Rockit and RKNN libraries Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/of : Add support for dynamic device tree Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/usb/serial : Add CH343 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/staging : Disable partial logging of fbtft Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/pinctrl/pinctrl-rockchip.h : Fix pinctrl configuration failure issue Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/include/dt-bindings/soc/rockchip,boot-mode.h : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/video : Add logo display support for LF40-480480-ARK and LF40-720720-ARK Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/boot/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/configs : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c : Fix the issue where some Micro SD cards fail to boot Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/common/image-fit.c : Add U-Boot support for luckfox-config Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/rkbin/bin/rv11 : Add firmware with a serial baud rate of 115200 and back up the original firmware Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/arch/arm/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/configs : Add defconfig files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/media/i2c : Add MIS5001 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm : Add default support for MIS5001 on Luckfox RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board : Delete irrelevant overwrite files and patch files Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/drv_ko/insmod_ko.sh : Register mis5001 driver during boot process Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * media/isp/release_camera_engine_rkaiq_rv1106_arm-rockchip830-linux-uclibcgnueabihf/isp_iqfiles : Add mis5001 iqfile Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/app/rkipc/rkipc/src/rv1106_ipc : Add rkipc application support for mis5001 sensor Signed-off-by: eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC : Enable default retrieval of mis5001 iqfile and include ROCKIT and RKNN libraries of RV1106 series board Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/build.sh : Remove operations related to applying and deleting patches Signed-off-by: eng29 <eng29@luckfox.com> * project/build.sh : Modify build system menu description; Apply lightweight system processing only during Buildroot and BusyBox system compilation Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board/buildroot/luckfox_pico_w_defconfig : Add pppd and pgrep for 4G module Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/tools/board/kernel/rv1106-luckfox-pico-ultra-ipc.dtsi : Add uart4m1 support for lastest luckfox-config tool Signed-off-by: eng29 <eng29@luckfox.com> --------- Signed-off-by: luckfox-eng29 <eng29@luckfox.com> Signed-off-by: eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
GitHub
@@ -1,48 +0,0 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# sshd Starts sshd.
|
||||
#
|
||||
|
||||
# Make sure the ssh-keygen progam exists
|
||||
[ -f /usr/bin/ssh-keygen ] || exit 0
|
||||
|
||||
umask 077
|
||||
|
||||
start() {
|
||||
chown root:root /var/empty/
|
||||
# Create any missing keys
|
||||
/usr/bin/ssh-keygen -A
|
||||
|
||||
printf "Starting sshd: "
|
||||
/usr/sbin/sshd
|
||||
touch /var/lock/sshd
|
||||
echo "OK"
|
||||
}
|
||||
stop() {
|
||||
printf "Stopping sshd: "
|
||||
killall sshd
|
||||
rm -f /var/lock/sshd
|
||||
echo "OK"
|
||||
}
|
||||
restart() {
|
||||
stop
|
||||
start
|
||||
}
|
||||
|
||||
case "$1" in
|
||||
start)
|
||||
start
|
||||
;;
|
||||
stop)
|
||||
stop
|
||||
;;
|
||||
restart|reload)
|
||||
restart
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||||
;;
|
||||
*)
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||||
echo "Usage: $0 {start|stop|restart}"
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exit 1
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esac
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exit $?
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|
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@@ -1,27 +0,0 @@
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#!/bin/sh
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||||
|
||||
check_hciconfig() {
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if command -v hciattach &> /dev/null; then
|
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if lsmod | grep -q "aic8800_fdrv"; then
|
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hciattach -s 1500000 /dev/ttyS1 any 1500000 flow nosleep&
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sleep 2
|
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if hciconfig -a | grep -q "hci0"; then
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hciconfig hci0 up&
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else
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echo "hci0 not found or not available."
|
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fi
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else
|
||||
echo "aic8800_fdrv not found."
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fi
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||||
fi
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||||
}
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||||
|
||||
case $1 in
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||||
start)
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||||
check_hciconfig
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;;
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*)
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exit 1
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;;
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esac
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||||
|
||||
@@ -1,55 +0,0 @@
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#!/bin/sh
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#
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||||
# python Starts python code.
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#
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||||
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||||
# Make sure the python progam exists
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[ -f /usr/bin/python ] || exit 0
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umask 077
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|
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main_path="/root/main.py"
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boot_path="/root/boot.py"
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|
||||
start() {
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# Run python progam
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if [ -f $main_path ]; then
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echo "running $main_path..."
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python $main_path
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else
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if [ -f $boot_path ]; then
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echo "running $boot_path..."
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python $boot_path
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else
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echo "$main_path and $boot_path not exist ,pass..."
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fi
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fi
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echo "OK"
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}
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stop() {
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printf "Stopping python: "
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killall python
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echo "OK"
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}
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restart() {
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stop
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start
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}
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|
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case "$1" in
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start)
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start
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;;
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stop)
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stop
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;;
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restart|reload)
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restart
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;;
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*)
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echo "Usage: $0 {start|stop|restart}"
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exit 1
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esac
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exit $?
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@@ -1,16 +0,0 @@
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#!/bin/sh
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||||
case $1 in
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start)
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if [ "$(hwclock | grep "1969")" ]; then
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echo "RTC time calibration"
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date -s 2024-01-01
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hwclock -w
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else
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echo "RTC does not require time calibration"
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fi
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;;
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*)
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exit 1
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;;
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esac
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Binary file not shown.
@@ -66,6 +66,7 @@ BR2_PACKAGE_LIBV4L=y
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BR2_PACKAGE_LIBV4L_UTILS=y
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BR2_PACKAGE_CJSON=y
|
||||
BR2_PACKAGE_CJSON_UTILS=y
|
||||
BR2_PACKAGE_PCRE2=y
|
||||
BR2_PACKAGE_BLUEZ_TOOLS=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_CLIENT=y
|
||||
BR2_PACKAGE_BLUEZ5_UTILS_TOOLS=y
|
||||
@@ -77,6 +78,9 @@ BR2_PACKAGE_IW=y
|
||||
BR2_PACKAGE_LRZSZ=y
|
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BR2_PACKAGE_NTP=y
|
||||
BR2_PACKAGE_OPENSSH=y
|
||||
BR2_PACKAGE_PPPD=y
|
||||
BR2_PACKAGE_PPPD_FILTER=y
|
||||
BR2_PACKAGE_PPPD_RADIUS=y
|
||||
BR2_PACKAGE_SAMBA4=y
|
||||
BR2_PACKAGE_SOCAT=y
|
||||
BR2_PACKAGE_BASH=y
|
||||
@@ -84,6 +88,7 @@ BR2_PACKAGE_BASH_LOADABLE_EXAMPLES=y
|
||||
BR2_PACKAGE_DIALOG=y
|
||||
BR2_PACKAGE_TIME=y
|
||||
BR2_PACKAGE_HTOP=y
|
||||
BR2_PACKAGE_PROCPS_NG=y
|
||||
BR2_PACKAGE_UTIL_LINUX_LIBMOUNT=y
|
||||
BR2_PACKAGE_NANO=y
|
||||
BR2_PACKAGE_HOST_DTC=y
|
||||
|
||||
@@ -1,24 +0,0 @@
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||||
export PATH="/bin:/sbin:/usr/bin:/usr/sbin"
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|
||||
export EDITOR='/bin/vi'
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||||
|
||||
#export PS1='[\u@\h \W]# '
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||||
if [ "$PS1" ]; then
|
||||
if [ "`id -u`" -eq 0 ]; then
|
||||
#export PS1='# '
|
||||
export PS1='[\u@\h \W]# '
|
||||
else
|
||||
#export PS1='$ '
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||||
export PS1='[\u@\h \W]$ '
|
||||
fi
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||||
fi
|
||||
|
||||
# Source configuration files from /etc/profile.d
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for i in /etc/profile.d/*.sh ; do
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if [ -r "$i" ]; then
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. $i
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fi
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||||
done
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unset i
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||||
|
||||
|
||||
@@ -1,13 +0,0 @@
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[global]
|
||||
workgroup = WORKGROUP
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||||
server string = luckfox samba server
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security = user
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passdb backend = smbpasswd
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||||
smb passwd file = /etc/samba/smbpasswd
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[public]
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||||
comment = public share
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||||
path = /
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||||
read only = no
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||||
user = root
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||||
create mask = 0755
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directory mask = 0755
|
||||
@@ -1,9 +0,0 @@
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||||
root:$1$dXmV8ZLO$eNAQzSYOgRkYMJRdsHwLS1:19664::::::
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||||
daemon:*:::::::
|
||||
bin:*:::::::
|
||||
sys:*:::::::
|
||||
sync:*:::::::
|
||||
mail:*:::::::
|
||||
www-data:*:::::::
|
||||
operator:*:::::::
|
||||
nobody:*:::::::
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||||
@@ -1 +0,0 @@
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||||
root:0:XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX:EF8BDD6C516032CDB7C15080FFE1B2D5:[U ]:LCT-5FEF3549:
|
||||
@@ -1,116 +0,0 @@
|
||||
# $OpenBSD: sshd_config,v 1.104 2021/07/02 05:11:21 dtucker Exp $
|
||||
|
||||
# This is the sshd server system-wide configuration file. See
|
||||
# sshd_config(5) for more information.
|
||||
|
||||
# This sshd was compiled with PATH=/bin:/sbin:/usr/bin:/usr/sbin
|
||||
|
||||
# The strategy used for options in the default sshd_config shipped with
|
||||
# OpenSSH is to specify options with their default value where
|
||||
# possible, but leave them commented. Uncommented options override the
|
||||
# default value.
|
||||
|
||||
#Port 22
|
||||
#AddressFamily any
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||||
#ListenAddress 0.0.0.0
|
||||
#ListenAddress ::
|
||||
|
||||
#HostKey /etc/ssh/ssh_host_rsa_key
|
||||
#HostKey /etc/ssh/ssh_host_ecdsa_key
|
||||
#HostKey /etc/ssh/ssh_host_ed25519_key
|
||||
|
||||
# Ciphers and keying
|
||||
#RekeyLimit default none
|
||||
|
||||
# Logging
|
||||
#SyslogFacility AUTH
|
||||
#LogLevel INFO
|
||||
|
||||
# Authentication:
|
||||
|
||||
#LoginGraceTime 2m
|
||||
PermitRootLogin yes
|
||||
#StrictModes yes
|
||||
#MaxAuthTries 6
|
||||
#MaxSessions 10
|
||||
|
||||
#PubkeyAuthentication yes
|
||||
|
||||
# The default is to check both .ssh/authorized_keys and .ssh/authorized_keys2
|
||||
# but this is overridden so installations will only check .ssh/authorized_keys
|
||||
AuthorizedKeysFile .ssh/authorized_keys
|
||||
|
||||
#AuthorizedPrincipalsFile none
|
||||
|
||||
#AuthorizedKeysCommand none
|
||||
#AuthorizedKeysCommandUser nobody
|
||||
|
||||
# For this to work you will also need host keys in /etc/ssh/ssh_known_hosts
|
||||
#HostbasedAuthentication no
|
||||
# Change to yes if you don't trust ~/.ssh/known_hosts for
|
||||
# HostbasedAuthentication
|
||||
#IgnoreUserKnownHosts no
|
||||
# Don't read the user's ~/.rhosts and ~/.shosts files
|
||||
#IgnoreRhosts yes
|
||||
|
||||
# To disable tunneled clear text passwords, change to no here!
|
||||
#PasswordAuthentication yes
|
||||
#PermitEmptyPasswords no
|
||||
|
||||
# Change to no to disable s/key passwords
|
||||
#KbdInteractiveAuthentication yes
|
||||
|
||||
# Kerberos options
|
||||
#KerberosAuthentication no
|
||||
#KerberosOrLocalPasswd yes
|
||||
#KerberosTicketCleanup yes
|
||||
#KerberosGetAFSToken no
|
||||
|
||||
# GSSAPI options
|
||||
#GSSAPIAuthentication no
|
||||
#GSSAPICleanupCredentials yes
|
||||
|
||||
# Set this to 'yes' to enable PAM authentication, account processing,
|
||||
# and session processing. If this is enabled, PAM authentication will
|
||||
# be allowed through the KbdInteractiveAuthentication and
|
||||
# PasswordAuthentication. Depending on your PAM configuration,
|
||||
# PAM authentication via KbdInteractiveAuthentication may bypass
|
||||
# the setting of "PermitRootLogin prohibit-password".
|
||||
# If you just want the PAM account and session checks to run without
|
||||
# PAM authentication, then enable this but set PasswordAuthentication
|
||||
# and KbdInteractiveAuthentication to 'no'.
|
||||
#UsePAM no
|
||||
|
||||
#AllowAgentForwarding yes
|
||||
#AllowTcpForwarding yes
|
||||
#GatewayPorts no
|
||||
#X11Forwarding no
|
||||
#X11DisplayOffset 10
|
||||
#X11UseLocalhost yes
|
||||
#PermitTTY yes
|
||||
#PrintMotd yes
|
||||
#PrintLastLog yes
|
||||
#TCPKeepAlive yes
|
||||
#PermitUserEnvironment no
|
||||
#Compression delayed
|
||||
#ClientAliveInterval 0
|
||||
#ClientAliveCountMax 3
|
||||
#UseDNS no
|
||||
#PidFile /var/run/sshd.pid
|
||||
#MaxStartups 10:30:100
|
||||
#PermitTunnel no
|
||||
#ChrootDirectory none
|
||||
#VersionAddendum none
|
||||
|
||||
# no default banner path
|
||||
#Banner none
|
||||
|
||||
# override default of no subsystems
|
||||
Subsystem sftp /usr/libexec/sftp-server
|
||||
|
||||
# Example of overriding settings on a per-user basis
|
||||
#Match User anoncvs
|
||||
# X11Forwarding no
|
||||
# AllowTcpForwarding no
|
||||
# PermitTTY no
|
||||
# ForceCommand cvs server
|
||||
2
sysdrv/tools/board/custom/.gitignore
vendored
2
sysdrv/tools/board/custom/.gitignore
vendored
@@ -1,2 +0,0 @@
|
||||
./custom.tar.gz
|
||||
./*.tar.gz
|
||||
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@@ -1,99 +0,0 @@
|
||||
From 94a0b2232c729c757547b88f2cbc035cef7e0bc1 Mon Sep 17 00:00:00 2001
|
||||
From: luckfox-eng29 <eng29@luckfox.com>
|
||||
Date: Tue, 8 Oct 2024 21:50:54 +0800
|
||||
Subject: [PATCH] patch:logo_center
|
||||
|
||||
Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
|
||||
---
|
||||
.../source/kernel/drivers/video/fbdev/core/fbcon.c | 14 +++++++++++++-
|
||||
.../source/kernel/drivers/video/fbdev/core/fbmem.c | 7 ++++++-
|
||||
2 files changed, 19 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/sysdrv/source/kernel/drivers/video/fbdev/core/fbcon.c b/sysdrv/source/kernel/drivers/video/fbdev/core/fbcon.c
|
||||
index 27828435d..c3ac676bb 100644
|
||||
--- a/sysdrv/source/kernel/drivers/video/fbdev/core/fbcon.c
|
||||
+++ b/sysdrv/source/kernel/drivers/video/fbdev/core/fbcon.c
|
||||
@@ -88,6 +88,9 @@
|
||||
# define DPRINTK(fmt, args...)
|
||||
#endif
|
||||
|
||||
+#define CURSOR_ENABLE 0
|
||||
+#define SHOW_CENTER 1
|
||||
+
|
||||
/*
|
||||
* FIXME: Locking
|
||||
*
|
||||
@@ -365,6 +368,7 @@ static int get_color(struct vc_data *vc, struct fb_info *info,
|
||||
|
||||
static void fb_flashcursor(struct work_struct *work)
|
||||
{
|
||||
+#if CURSOR_ENABLE
|
||||
struct fb_info *info = container_of(work, struct fb_info, queue);
|
||||
struct fbcon_ops *ops = info->fbcon_par;
|
||||
struct vc_data *vc = NULL;
|
||||
@@ -395,6 +399,7 @@ static void fb_flashcursor(struct work_struct *work)
|
||||
ops->cursor(vc, info, mode, get_color(vc, info, c, 1),
|
||||
get_color(vc, info, c, 0));
|
||||
console_unlock();
|
||||
+#endif
|
||||
}
|
||||
|
||||
static void cursor_timer_handler(struct timer_list *t)
|
||||
@@ -601,7 +606,12 @@ static void fbcon_prepare_logo(struct vc_data *vc, struct fb_info *info,
|
||||
if (fb_get_color_depth(&info->var, &info->fix) == 1)
|
||||
erase &= ~0x400;
|
||||
logo_height = fb_prepare_logo(info, ops->rotate);
|
||||
- logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
|
||||
+
|
||||
+#if SHOW_CENTER
|
||||
+ logo_height += (info->var.yres/2) - (logo_height/2);
|
||||
+#endif
|
||||
+
|
||||
+ logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
|
||||
q = (unsigned short *) (vc->vc_origin +
|
||||
vc->vc_size_row * rows);
|
||||
step = logo_lines * cols;
|
||||
@@ -1331,6 +1341,7 @@ static void fbcon_clear_margins(struct vc_data *vc, int bottom_only)
|
||||
|
||||
static void fbcon_cursor(struct vc_data *vc, int mode)
|
||||
{
|
||||
+#if CURSOR_ENABLE
|
||||
struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]];
|
||||
struct fbcon_ops *ops = info->fbcon_par;
|
||||
int c = scr_readw((u16 *) vc->vc_pos);
|
||||
@@ -1352,6 +1363,7 @@ static void fbcon_cursor(struct vc_data *vc, int mode)
|
||||
|
||||
ops->cursor(vc, info, mode, get_color(vc, info, c, 1),
|
||||
get_color(vc, info, c, 0));
|
||||
+#endif
|
||||
}
|
||||
|
||||
static int scrollback_phys_max = 0;
|
||||
diff --git a/sysdrv/source/kernel/drivers/video/fbdev/core/fbmem.c b/sysdrv/source/kernel/drivers/video/fbdev/core/fbmem.c
|
||||
index d787a344b..690d48fba 100644
|
||||
--- a/sysdrv/source/kernel/drivers/video/fbdev/core/fbmem.c
|
||||
+++ b/sysdrv/source/kernel/drivers/video/fbdev/core/fbmem.c
|
||||
@@ -38,7 +38,7 @@
|
||||
|
||||
#include <asm/fb.h>
|
||||
|
||||
-
|
||||
+#define SHOW_CENTER 1
|
||||
/*
|
||||
* Frame buffer device initialization and setup routines
|
||||
*/
|
||||
@@ -520,6 +520,11 @@ static int fb_show_logo_line(struct fb_info *info, int rotate,
|
||||
image.dy = y;
|
||||
}
|
||||
|
||||
+#if SHOW_CENTER
|
||||
+image.dx = (info->var.xres - logo->width) / 2;
|
||||
+image.dy = (info->var.yres - logo->height) / 2;
|
||||
+#endif
|
||||
+
|
||||
image.width = logo->width;
|
||||
image.height = logo->height;
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,22 +0,0 @@
|
||||
CONFIG_PPP=y
|
||||
CONFIG_PPP_BSDCOMP=y
|
||||
CONFIG_PPP_DEFLATE=y
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPPOE=y
|
||||
CONFIG_PPP_ASYNC=y
|
||||
CONFIG_PPP_SYNC_TTY=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_RNDIS_HOST=y
|
||||
CONFIG_USB_NET_QMI_WWAN=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIAL_IPW=y
|
||||
CONFIG_USB_SERIAL_OPTION=y
|
||||
CONFIG_USB_ETH=y
|
||||
CONFIG_USB_ETH_EEM=y
|
||||
CONFIG_USB_FUNCTIONFS=y
|
||||
CONFIG_USB_FUNCTIONFS_ETH=y
|
||||
CONFIG_USB_FUNCTIONFS_RNDIS=y
|
||||
CONFIG_USB_G_MULTI=y
|
||||
CONFIG_USB_G_MULTI_CDC=y
|
||||
@@ -1,42 +0,0 @@
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_BLK_CGROUP=y
|
||||
CONFIG_CGROUP_SCHED=y
|
||||
CONFIG_CFS_BANDWIDTH=y
|
||||
CONFIG_RT_GROUP_SCHED=y
|
||||
CONFIG_CGROUP_PIDS=y
|
||||
CONFIG_CGROUP_RDMA=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_CGROUP_DEVICE=y
|
||||
CONFIG_CGROUP_CPUACCT=y
|
||||
CONFIG_CGROUP_DEBUG=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_USER_NS=y
|
||||
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_NF_CONNTRACK=y
|
||||
CONFIG_NF_TABLES=y
|
||||
CONFIG_NFT_MASQ=y
|
||||
CONFIG_NFT_REDIR=y
|
||||
CONFIG_NFT_NAT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CGROUP=y
|
||||
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
|
||||
CONFIG_NF_TABLES_IPV4=y
|
||||
CONFIG_IP_NF_IPTABLES=y
|
||||
CONFIG_IP_NF_FILTER=y
|
||||
CONFIG_IP_NF_NAT=y
|
||||
CONFIG_IP_NF_TARGET_MASQUERADE=y
|
||||
CONFIG_IP6_NF_IPTABLES=m
|
||||
CONFIG_NF_TABLES_BRIDGE=m
|
||||
CONFIG_BRIDGE_NF_EBTABLES=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_CLS_CGROUP=y
|
||||
CONFIG_CGROUP_NET_PRIO=y
|
||||
|
||||
CONFIG_VETH=y
|
||||
CONFIG_OVERLAY_FS=y
|
||||
@@ -1,24 +0,0 @@
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_PPP=y
|
||||
CONFIG_PPP_BSDCOMP=y
|
||||
CONFIG_PPP_DEFLATE=y
|
||||
CONFIG_PPP_FILTER=y
|
||||
CONFIG_PPP_MPPE=y
|
||||
CONFIG_PPP_MULTILINK=y
|
||||
CONFIG_PPPOE=y
|
||||
CONFIG_PPP_ASYNC=y
|
||||
CONFIG_PPP_SYNC_TTY=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_RNDIS_HOST=y
|
||||
CONFIG_USB_NET_QMI_WWAN=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIAL_IPW=y
|
||||
CONFIG_USB_SERIAL_OPTION=y
|
||||
CONFIG_USB_ETH=y
|
||||
CONFIG_USB_ETH_EEM=y
|
||||
CONFIG_USB_FUNCTIONFS=y
|
||||
CONFIG_USB_FUNCTIONFS_ETH=y
|
||||
CONFIG_USB_FUNCTIONFS_RNDIS=y
|
||||
CONFIG_USB_G_MULTI=y
|
||||
CONFIG_USB_G_MULTI_CDC=y
|
||||
CONFIG_NLS_UTF8=y
|
||||
@@ -1,44 +0,0 @@
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_DAX=y
|
||||
CONFIG_EROFS_FS=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
CONFIG_LIBCRC32C=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_PHY_ROCKCHIP_CSI2_DPHY=y
|
||||
CONFIG_PRINTK_TIME_FROM_ARM_ARCH_TIMER=y
|
||||
CONFIG_ROCKCHIP_DVBM=y
|
||||
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
|
||||
CONFIG_ROCKCHIP_MULTI_RGA=y
|
||||
CONFIG_ROCKCHIP_RAMDISK=y
|
||||
CONFIG_ROCKCHIP_RGA_PROC_FS=y
|
||||
CONFIG_ROCKCHIP_THUNDER_BOOT=y
|
||||
CONFIG_SND_SOC_RV1106=m
|
||||
CONFIG_VIDEO_ROCKCHIP_CIF=y
|
||||
CONFIG_VIDEO_ROCKCHIP_ISP=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_ALGAPI2=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
|
||||
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
|
||||
CONFIG_FS_DAX=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INITRD_ASYNC=y
|
||||
CONFIG_MMC_BLOCK=y
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=m
|
||||
CONFIG_MMC_QUEUE_DEPTH=1
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_ROCKCHIP_RGA_DEBUGGER=y
|
||||
CONFIG_ROCKCHIP_THUNDER_BOOT_MMC=y
|
||||
CONFIG_ROCKCHIP_THUNDER_BOOT_SFC=y
|
||||
CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_KEYBOARD=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
@@ -1,346 +0,0 @@
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_KERNEL_XZ=y
|
||||
CONFIG_DEFAULT_HOSTNAME="luckfox"
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BUG is not set
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_IO_URING is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
# CONFIG_VDSO is not set
|
||||
CONFIG_VMSPLIT_3G_OPT=y
|
||||
CONFIG_THUMB2_KERNEL=y
|
||||
# CONFIG_CPU_SW_DOMAIN_PAN is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=9
|
||||
CONFIG_UACCESS_WITH_MEMCPY=y
|
||||
CONFIG_CMDLINE="user_debug=31"
|
||||
CONFIG_CMDLINE_EXTEND=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_ARM_ROCKCHIP_CPUFREQ=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_NEON=y
|
||||
# CONFIG_SUSPEND is not set
|
||||
CONFIG_JUMP_LABEL=y
|
||||
# CONFIG_STACKPROTECTOR_STRONG is not set
|
||||
# CONFIG_STRICT_KERNEL_RWX is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_CMDLINE_PARTITION=y
|
||||
# CONFIG_MQ_IOSCHED_KYBER is not set
|
||||
CONFIG_KSM=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_INACTIVE=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_INET_TABLE_PERTURB_ORDER=8
|
||||
# CONFIG_INET_DIAG is not set
|
||||
CONFIG_IPV6=m
|
||||
# CONFIG_IPV6_SIT is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_ALLOW_DEV_COREDUMP is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_OF_PARTS is not set
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
|
||||
CONFIG_MTD_SPI_NOR_MISC=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OF_DTBO=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_SCSI_UFSHCD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_CORE is not set
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_CAVIUM is not set
|
||||
# CONFIG_NET_VENDOR_CIRRUS is not set
|
||||
# CONFIG_NET_VENDOR_CORTINA is not set
|
||||
# CONFIG_NET_VENDOR_EZCHIP is not set
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_GOOGLE is not set
|
||||
# CONFIG_NET_VENDOR_HISILICON is not set
|
||||
# CONFIG_NET_VENDOR_HUAWEI is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MELLANOX is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_MICROSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NETRONOME is not set
|
||||
# CONFIG_NET_VENDOR_NI is not set
|
||||
# CONFIG_NET_VENDOR_PENSANDO is not set
|
||||
# CONFIG_NET_VENDOR_QUALCOMM is not set
|
||||
# CONFIG_NET_VENDOR_RENESAS is not set
|
||||
# CONFIG_NET_VENDOR_ROCKER is not set
|
||||
# CONFIG_NET_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_SOCIONEXT is not set
|
||||
CONFIG_STMMAC_ETH=y
|
||||
# CONFIG_DWMAC_GENERIC is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_NET_VENDOR_XILINX is not set
|
||||
CONFIG_RK630_PHY=y
|
||||
# CONFIG_USB_NET_DRIVERS is not set
|
||||
# CONFIG_WLAN_VENDOR_ADMTEK is not set
|
||||
# CONFIG_WLAN_VENDOR_ATH is not set
|
||||
# CONFIG_WLAN_VENDOR_ATMEL is not set
|
||||
# CONFIG_WLAN_VENDOR_BROADCOM is not set
|
||||
# CONFIG_WLAN_VENDOR_CISCO is not set
|
||||
# CONFIG_WLAN_VENDOR_INTEL is not set
|
||||
# CONFIG_WLAN_VENDOR_INTERSIL is not set
|
||||
# CONFIG_WLAN_VENDOR_MARVELL is not set
|
||||
# CONFIG_WLAN_VENDOR_MEDIATEK is not set
|
||||
# CONFIG_WLAN_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_WLAN_VENDOR_RALINK is not set
|
||||
# CONFIG_WLAN_VENDOR_REALTEK is not set
|
||||
# CONFIG_WLAN_VENDOR_RSI is not set
|
||||
# CONFIG_WLAN_VENDOR_ST is not set
|
||||
# CONFIG_WLAN_VENDOR_TI is not set
|
||||
# CONFIG_WLAN_VENDOR_ZYDAS is not set
|
||||
# CONFIG_WLAN_VENDOR_QUANTENNA is not set
|
||||
CONFIG_WL_ROCKCHIP=m
|
||||
CONFIG_WIFI_BUILD_MODULE=y
|
||||
# CONFIG_BCMDHD is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_ADC=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
CONFIG_KEYBOARD_GPIO_POLLED=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_GOODIX=y
|
||||
CONFIG_TOUCHSCREEN_EDT_FT5X06=y
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=6
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_ROCKCHIP=y
|
||||
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_I2C_RK3X=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_ROCKCHIP=y
|
||||
CONFIG_SPI_ROCKCHIP_SFC=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_SPI_SLAVE=y
|
||||
# CONFIG_PTP_1588_CLOCK is not set
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_RESTART=y
|
||||
CONFIG_SYSCON_REBOOT_MODE=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_DEVFREQ_THERMAL=y
|
||||
CONFIG_ROCKCHIP_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
# CONFIG_MEDIA_CEC_SUPPORT is not set
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
|
||||
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
|
||||
# CONFIG_MEDIA_RADIO_SUPPORT is not set
|
||||
# CONFIG_MEDIA_SDR_SUPPORT is not set
|
||||
# CONFIG_MEDIA_TEST_SUPPORT is not set
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=y
|
||||
CONFIG_VIDEOBUF2_CMA_SG=y
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_VIDEO_ROCKCHIP_CIF=m
|
||||
CONFIG_VIDEO_ROCKCHIP_ISP=m
|
||||
CONFIG_VIDEO_RK_IRCUT=y
|
||||
CONFIG_VIDEO_SC3336=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_EDID=y
|
||||
CONFIG_DRM_ROCKCHIP=y
|
||||
CONFIG_ROCKCHIP_VOP=y
|
||||
CONFIG_ROCKCHIP_RGB=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_DRM_SII902X=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_ROCKCHIP_MULTI_RGA=m
|
||||
CONFIG_ROCKCHIP_RGA_PROC_FS=y
|
||||
# CONFIG_ROCKCHIP_RGA_DEBUG_FS is not set
|
||||
CONFIG_ROCKCHIP_RVE=m
|
||||
CONFIG_ROCKCHIP_RVE_PROC_FS=y
|
||||
CONFIG_ROCKCHIP_DVBM=m
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
# CONFIG_SND_PCM_TIMER is not set
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_ROCKCHIP=y
|
||||
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
|
||||
CONFIG_SND_SOC_RV1106=y
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_HID is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_OTG=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_CONFIGFS=y
|
||||
CONFIG_USB_CONFIGFS_UEVENT=y
|
||||
CONFIG_USB_CONFIGFS_RNDIS=y
|
||||
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
|
||||
CONFIG_USB_CONFIGFS_F_FS=y
|
||||
CONFIG_USB_CONFIGFS_F_UAC1=y
|
||||
CONFIG_USB_CONFIGFS_F_UAC2=y
|
||||
CONFIG_USB_CONFIGFS_F_HID=y
|
||||
CONFIG_USB_CONFIGFS_F_UVC=y
|
||||
CONFIG_USB_GADGETFS=y
|
||||
CONFIG_USB_MASS_STORAGE=y
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_PWRSEQ_EMMC is not set
|
||||
CONFIG_MMC_BLOCK_MINORS=32
|
||||
CONFIG_MMC_QUEUE_DEPTH=1
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_ACTIVITY=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_ROCKCHIP=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP_CMA_HEAP=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP_CMA_ALIGNMENT=0
|
||||
CONFIG_DMABUF_RK_HEAPS_DEBUG=y
|
||||
# CONFIG_VIRTIO_MENU is not set
|
||||
# CONFIG_VHOST_MENU is not set
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_FB_TFT=y
|
||||
CONFIG_FB_TFT_ST7735R=y
|
||||
CONFIG_FB_TFT_ST7789V=y
|
||||
CONFIG_COMMON_CLK_PROCFS=y
|
||||
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_CPU_RV1106=y
|
||||
CONFIG_ROCKCHIP_AMP=y
|
||||
CONFIG_ROCKCHIP_CPUINFO=y
|
||||
CONFIG_ROCKCHIP_IOMUX=y
|
||||
CONFIG_ROCKCHIP_OPP=y
|
||||
CONFIG_ROCKCHIP_PVTM=y
|
||||
CONFIG_ROCKCHIP_SYSTEM_MONITOR=y
|
||||
CONFIG_ROCKCHIP_VENDOR_STORAGE=y
|
||||
CONFIG_FIQ_DEBUGGER=y
|
||||
CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
|
||||
CONFIG_RK_CONSOLE_THREAD=y
|
||||
CONFIG_FIQ_DEBUGGER_FIQ_GLUE=y
|
||||
CONFIG_ROCKCHIP_NPOR_POWERGOOD=y
|
||||
CONFIG_RK_CMA_PROCFS=y
|
||||
CONFIG_RK_DMABUF_PROCFS=y
|
||||
CONFIG_RK_MEMBLOCK_PROCFS=y
|
||||
CONFIG_DEVFREQ_GOV_USERSPACE=y
|
||||
CONFIG_EXTCON=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_ROCKCHIP_SARADC=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_CSI2_DPHY=m
|
||||
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
CONFIG_PHY_ROCKCHIP_MIPI_RX=y
|
||||
CONFIG_ANDROID=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_ROCKCHIP_RKNPU=m
|
||||
# CONFIG_ROCKCHIP_RKNPU_DEBUG_FS is not set
|
||||
CONFIG_ROCKCHIP_RKNPU_PROC_FS=y
|
||||
CONFIG_ROCKCHIP_RKNPU_DMA_HEAP=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXPORTFS_BLOCK_OPS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_EXFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
|
||||
# CONFIG_JFFS2_RTIME is not set
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
# CONFIG_UBIFS_FS_ZSTD is not set
|
||||
CONFIG_SQUASHFS=y
|
||||
# CONFIG_SQUASHFS_ZLIB is not set
|
||||
CONFIG_SQUASHFS_XZ=y
|
||||
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_CRYPTO_ZSTD=y
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
# CONFIG_XZ_DEC_POWERPC is not set
|
||||
# CONFIG_XZ_DEC_IA64 is not set
|
||||
# CONFIG_XZ_DEC_SPARC is not set
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=0
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_DEBUG_MISC is not set
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_RUNTIME_TESTING_MENU is not set
|
||||
@@ -1,233 +0,0 @@
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_KERNEL_XZ=y
|
||||
CONFIG_DEFAULT_HOSTNAME="luckfox"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
# CONFIG_BUG is not set
|
||||
# CONFIG_ELF_CORE is not set
|
||||
# CONFIG_BASE_FULL is not set
|
||||
# CONFIG_IO_URING is not set
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
# CONFIG_VDSO is not set
|
||||
CONFIG_VMSPLIT_3G_OPT=y
|
||||
CONFIG_THUMB2_KERNEL=y
|
||||
# CONFIG_CPU_SW_DOMAIN_PAN is not set
|
||||
CONFIG_FORCE_MAX_ZONEORDER=9
|
||||
CONFIG_UACCESS_WITH_MEMCPY=y
|
||||
CONFIG_CMDLINE="user_debug=31"
|
||||
CONFIG_CMDLINE_EXTEND=y
|
||||
CONFIG_CPU_FREQ=y
|
||||
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
CONFIG_ARM_ROCKCHIP_CPUFREQ=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_NEON=y
|
||||
# CONFIG_SUSPEND is not set
|
||||
CONFIG_JUMP_LABEL=y
|
||||
# CONFIG_STACKPROTECTOR_STRONG is not set
|
||||
# CONFIG_STRICT_KERNEL_RWX is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_MSDOS_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
CONFIG_CMDLINE_PARTITION=y
|
||||
# CONFIG_MQ_IOSCHED_KYBER is not set
|
||||
CONFIG_KSM=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_INACTIVE=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_INET_TABLE_PERTURB_ORDER=8
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_ALLOW_DEV_COREDUMP is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_OF_PARTS is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_CORE is not set
|
||||
# CONFIG_NET_VENDOR_ALACRITECH is not set
|
||||
# CONFIG_NET_VENDOR_AMAZON is not set
|
||||
# CONFIG_NET_VENDOR_AQUANTIA is not set
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_AURORA is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_CADENCE is not set
|
||||
# CONFIG_NET_VENDOR_CAVIUM is not set
|
||||
# CONFIG_NET_VENDOR_CIRRUS is not set
|
||||
# CONFIG_NET_VENDOR_CORTINA is not set
|
||||
# CONFIG_NET_VENDOR_EZCHIP is not set
|
||||
# CONFIG_NET_VENDOR_FARADAY is not set
|
||||
# CONFIG_NET_VENDOR_GOOGLE is not set
|
||||
# CONFIG_NET_VENDOR_HISILICON is not set
|
||||
# CONFIG_NET_VENDOR_HUAWEI is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MELLANOX is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_MICROSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_NETRONOME is not set
|
||||
# CONFIG_NET_VENDOR_NI is not set
|
||||
# CONFIG_NET_VENDOR_PENSANDO is not set
|
||||
# CONFIG_NET_VENDOR_QUALCOMM is not set
|
||||
# CONFIG_NET_VENDOR_RENESAS is not set
|
||||
# CONFIG_NET_VENDOR_ROCKER is not set
|
||||
# CONFIG_NET_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SOLARFLARE is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
# CONFIG_NET_VENDOR_SOCIONEXT is not set
|
||||
CONFIG_STMMAC_ETH=y
|
||||
# CONFIG_DWMAC_GENERIC is not set
|
||||
# CONFIG_NET_VENDOR_SYNOPSYS is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_NET_VENDOR_XILINX is not set
|
||||
CONFIG_RK630_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=6
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_ROCKCHIP=y
|
||||
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
CONFIG_I2C_RK3X=y
|
||||
# CONFIG_PTP_1588_CLOCK is not set
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_RESTART=y
|
||||
CONFIG_SYSCON_REBOOT_MODE=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_WRITABLE_TRIPS=y
|
||||
CONFIG_THERMAL_GOV_USER_SPACE=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_DEVFREQ_THERMAL=y
|
||||
CONFIG_ROCKCHIP_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_REGULATOR_PWM=y
|
||||
# CONFIG_MEDIA_CEC_SUPPORT is not set
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
|
||||
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
|
||||
# CONFIG_MEDIA_RADIO_SUPPORT is not set
|
||||
# CONFIG_MEDIA_SDR_SUPPORT is not set
|
||||
# CONFIG_MEDIA_TEST_SUPPORT is not set
|
||||
CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_VIDEOBUF2_CMA_SG=y
|
||||
CONFIG_VIDEOBUF2_VMALLOC=y
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_VIDEO_ROCKCHIP_CIF=m
|
||||
CONFIG_VIDEO_ROCKCHIP_ISP=m
|
||||
CONFIG_VIDEO_RK_IRCUT=y
|
||||
CONFIG_ROCKCHIP_MULTI_RGA=m
|
||||
CONFIG_ROCKCHIP_RVE=m
|
||||
CONFIG_ROCKCHIP_DVBM=m
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
# CONFIG_SND_PCM_TIMER is not set
|
||||
# CONFIG_SND_SUPPORT_OLD_API is not set
|
||||
# CONFIG_SND_DRIVERS is not set
|
||||
# CONFIG_SND_ARM is not set
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_ROCKCHIP=y
|
||||
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
|
||||
CONFIG_SND_SOC_RV1106=y
|
||||
CONFIG_SND_SIMPLE_CARD=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_ACTIVITY=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_PL330_DMA=y
|
||||
CONFIG_SYNC_FILE=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP_CMA_HEAP=y
|
||||
CONFIG_DMABUF_HEAPS_ROCKCHIP_CMA_ALIGNMENT=0
|
||||
CONFIG_DMABUF_RK_HEAPS_DEBUG=y
|
||||
# CONFIG_VIRTIO_MENU is not set
|
||||
# CONFIG_VHOST_MENU is not set
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_COMMON_CLK_PROCFS=y
|
||||
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_CPU_RV1106=y
|
||||
CONFIG_ROCKCHIP_AMP=y
|
||||
CONFIG_ROCKCHIP_CPUINFO=y
|
||||
CONFIG_ROCKCHIP_PVTM=y
|
||||
CONFIG_ROCKCHIP_SYSTEM_MONITOR=y
|
||||
CONFIG_FIQ_DEBUGGER=y
|
||||
CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE=y
|
||||
CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
|
||||
CONFIG_RK_CONSOLE_THREAD=y
|
||||
CONFIG_FIQ_DEBUGGER_FIQ_GLUE=y
|
||||
CONFIG_ROCKCHIP_NPOR_POWERGOOD=y
|
||||
CONFIG_PM_DEVFREQ=y
|
||||
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
|
||||
CONFIG_DEVFREQ_GOV_USERSPACE=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_ROCKCHIP_SARADC=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_PHY_ROCKCHIP_CSI2_DPHY=m
|
||||
CONFIG_PHY_ROCKCHIP_MIPI_RX=y
|
||||
CONFIG_ANDROID=y
|
||||
# CONFIG_NVMEM_SYSFS is not set
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_ROCKCHIP_RKNPU=m
|
||||
CONFIG_ROCKCHIP_RKNPU_PROC_FS=y
|
||||
# CONFIG_FILE_LOCKING is not set
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_SQUASHFS=y
|
||||
# CONFIG_SQUASHFS_ZLIB is not set
|
||||
CONFIG_SQUASHFS_XZ=y
|
||||
CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
|
||||
# CONFIG_NETWORK_FILESYSTEMS is not set
|
||||
CONFIG_NLS=y
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
# CONFIG_XZ_DEC_POWERPC is not set
|
||||
# CONFIG_XZ_DEC_IA64 is not set
|
||||
# CONFIG_XZ_DEC_SPARC is not set
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=0
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_DEBUG_MISC is not set
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_RUNTIME_TESTING_MENU is not set
|
||||
@@ -1,410 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
#include "rv1106-amp.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk1p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
|
||||
};
|
||||
|
||||
acodec_sound: acodec-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "rv-acodec";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
// DHT11
|
||||
dht11_sensor {
|
||||
compatible = "dht11";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_pc7>;
|
||||
|
||||
dht11@1 {
|
||||
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
label = "dht11";
|
||||
linux,default-trigger = "humidity";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** AUDIO ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** CPU ********************************/
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
/***************************** ADC ********************************/
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
/***************************** USB *********************************/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&u2phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/*****************************CSI ********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&sc4336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input2: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&sc530ai_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3336: sc3336@30 {
|
||||
compatible = "smartsens,sc3336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2119-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc4336: sc4336@30 {
|
||||
compatible = "smartsens,sc4336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "OT01";
|
||||
rockchip,camera-module-lens-name = "40IRC_F16";
|
||||
port {
|
||||
sc4336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input1>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc530ai: sc530ai@30 {
|
||||
compatible = "smartsens,sc530ai";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2115-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc530ai_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input2>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/***************************** PINCTRL ********************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
fbtft@0{
|
||||
compatible = "sitronix,st7789v";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
fps = <30>;
|
||||
buswidth = <8>;
|
||||
debug = <0x7>;
|
||||
led-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;//BL
|
||||
dc-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; //DC
|
||||
reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; //RES
|
||||
};
|
||||
};
|
||||
// I2C
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m1_xfer>;
|
||||
};
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0m2_xfer>;
|
||||
};
|
||||
// UART
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m0_pins &pwm0m1_pins>;
|
||||
};
|
||||
&pwm1 {
|
||||
pinctrl-0 = <&pwm1m0_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m2_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m0_pins &pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m0_pins &pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m0_pins &pwm10m1_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m0_pins &pwm11m1_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1-pc7 {
|
||||
gpio1_pc7:gpio1-pc7 {
|
||||
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,85 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Mini";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,95 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Plus";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C0_M2 */
|
||||
&i2c0 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -1,66 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico WebBee";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********CSI**********/
|
||||
&i2c4{
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/********AUDIO**********/
|
||||
&i2s0_8ch {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -1,157 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
|
||||
gpio4pa4:gpio4pa4 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa4>;
|
||||
regulator-name = "gpio4_pa4";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa3:gpio4pa3 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa3>;
|
||||
regulator-name = "gpio4_pa3";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa2:gpio4pa2 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa2>;
|
||||
regulator-name = "gpio4_pa2";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa6:gpio4pa6 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa6>;
|
||||
regulator-name = "gpio4_pa6";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pb0:gpio4pb0 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pb0>;
|
||||
regulator-name = "gpio4_pb0";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pb1:gpio4pb1 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pb1>;
|
||||
regulator-name = "gpio4_pb1";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
/**********GPIO***********/
|
||||
&pinctrl{
|
||||
gpio {
|
||||
gpio4_pa4:gpio4-pa4 {
|
||||
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa3:gpio4-pa3 {
|
||||
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa2:gpio4-pa2 {
|
||||
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa6:gpio4-pa6 {
|
||||
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pb0:gpio4-pb0 {
|
||||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pb1:gpio4-pb1 {
|
||||
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -1,408 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
#include "rv1106-amp.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk1p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
|
||||
};
|
||||
|
||||
acodec_sound: acodec-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "rv-acodec";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
// DHT11
|
||||
dht11_sensor {
|
||||
compatible = "dht11";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_pc7>;
|
||||
|
||||
dht11@1 {
|
||||
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
label = "dht11";
|
||||
linux,default-trigger = "humidity";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/***************************** AUDIO ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
/***************************** CPU ********************************/
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
/***************************** ADC ********************************/
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** CSI ********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&sc4336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input2: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&sc530ai_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3336: sc3336@30 {
|
||||
compatible = "smartsens,sc3336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2119-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc4336: sc4336@30 {
|
||||
compatible = "smartsens,sc4336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "OT01";
|
||||
rockchip,camera-module-lens-name = "40IRC_F16";
|
||||
port {
|
||||
sc4336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input1>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc530ai: sc530ai@30 {
|
||||
compatible = "smartsens,sc530ai";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2115-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc530ai_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input2>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/*****************************PINCTRL********************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
fbtft@0{
|
||||
compatible = "sitronix,st7789v";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
fps = <30>;
|
||||
buswidth = <8>;
|
||||
debug = <0x7>;
|
||||
led-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;//BL
|
||||
dc-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; //DC
|
||||
reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; //RES
|
||||
};
|
||||
};
|
||||
// I2C
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0m2_xfer>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1m1_xfer>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m1_xfer &i2c3m0_xfer>;
|
||||
};
|
||||
|
||||
// &i2c4 {
|
||||
// pinctrl-0 = <&i2c4m0_xfer>;
|
||||
// };
|
||||
|
||||
// UART
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
||||
};
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1-pc7 {
|
||||
gpio1_pc7:gpio1-pc7 {
|
||||
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -1,539 +0,0 @@
|
||||
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
status = "okay";
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm1 0 100000 50000>;
|
||||
brightness-levels = <
|
||||
0 1 2 3 4 5 6 7
|
||||
8 9 10 11 12 13 14 15
|
||||
16 17 18 19 20 21 22 23
|
||||
24 25 26 27 28 29 30 31
|
||||
32 33 34 35 36 37 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255>;
|
||||
default-brightness-level = <255>;
|
||||
};
|
||||
|
||||
panel: panel {
|
||||
compatible = "simple-panel";
|
||||
backlight = <&backlight>;
|
||||
|
||||
reset-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-ms = <200>;
|
||||
status = "okay";
|
||||
|
||||
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
|
||||
width-mm = <85>;
|
||||
height-mm = <85>;
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
|
||||
timing0: timing0 {
|
||||
clock-frequency = <30000000>;
|
||||
hactive = <720>;
|
||||
vactive = <720>;
|
||||
hback-porch = <44>;
|
||||
hfront-porch = <46>;
|
||||
vback-porch = <18>;
|
||||
vfront-porch = <16>;
|
||||
hsync-len = <2>;
|
||||
vsync-len = <2>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in_rgb: endpoint {
|
||||
remote-endpoint = <&rgb_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
drm_logo: drm-logo@00000000 {
|
||||
compatible = "rockchip,drm-logo";
|
||||
reg = <0x0 0x0>;
|
||||
};
|
||||
linux,cma {
|
||||
status = "okay";
|
||||
compatible = "shared-dma-pool";
|
||||
inactive;
|
||||
reusable;
|
||||
size = <0xA00000>; //10M
|
||||
linux,cma-default;
|
||||
};
|
||||
mmc_ecsd: mmc@3f000 {
|
||||
reg = <0x3f000 0x00001000>;
|
||||
};
|
||||
};
|
||||
|
||||
acodec_sound: acodec-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "rv1106-acodec";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
|
||||
dsm_sound: dsm-sound {
|
||||
status = "disabled";
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,name = "rockchip,dsm-sound";
|
||||
simple-audio-card,bitclock-master = <&sndcodec>;
|
||||
simple-audio-card,frame-master = <&sndcodec>;
|
||||
sndcpu: simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
sndcodec: simple-audio-card,codec {
|
||||
sound-dai = <&dsm>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** audio ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/************************* FIQ_DUBUGGER ****************************/
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** USB *********************************/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&u2phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** DSM *********************************/
|
||||
&dsm {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
/*************************** CSI *********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
// pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3336: sc3336@30 {
|
||||
compatible = "smartsens,sc3336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2119-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** ADC ********************************/
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**************************** LCD/TP ******************************/
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm1m2_pins>;
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
logo-memory-region = <&drm_logo>;
|
||||
};
|
||||
|
||||
&rgb {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
|
||||
ports {
|
||||
rgb_out: port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rgb_out_panel: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&panel_in_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rgb_in_vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&route_rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
GT911:touchscreen {
|
||||
compatible = "goodix,gt911";
|
||||
reg = <0x14>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
/**************************** PINCTRL ******************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
// I2C
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1m1_xfer>;
|
||||
};
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2m0_xfer>;
|
||||
};
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m0_xfer &i2c3m1_xfer &i2c3m2_xfer &tp_rst &tp_irq>;
|
||||
};
|
||||
&i2c4 {
|
||||
pinctrl-0 = <&i2c4m0_xfer &i2c4m1_xfer &i2c4m2_xfer>;
|
||||
};
|
||||
|
||||
// UART
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
||||
};
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m0_xfer &uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m0_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m1_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m1_pins &pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m0_pins &pwm4m1_pins &pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm7 {
|
||||
pinctrl-0 = <&pwm7m0_pins &pwm7m1_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen {
|
||||
tp_rst:tp-rst {
|
||||
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
tp_irq:tp-irq {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,129 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Max";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********FLASH**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
rockchip,dis-u2-susphy;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C1_M1 */
|
||||
&i2c1 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,71 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106g-evb2-v10.dts"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pro Max";
|
||||
compatible = "rockchip,rv1106g-evb2-v12", "rockchip,rv1106";
|
||||
|
||||
chosen {
|
||||
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/delete-node/ &thunder_boot_spi_nor;
|
||||
|
||||
&emmc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,baudrate = <115200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer>;
|
||||
};
|
||||
|
||||
&rkisp_thunderboot {
|
||||
/* reg's offset MUST match with RTOS */
|
||||
/*
|
||||
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
|
||||
* e.g. 2304x1296: 0xf30000
|
||||
*/
|
||||
reg = <0x00860000 0xf30000>;
|
||||
};
|
||||
|
||||
&ramdisk_r {
|
||||
reg = <0x1790000 (20 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&ramdisk_c {
|
||||
reg = <0x2b90000 (16 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
@@ -1,106 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pro";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106";
|
||||
};
|
||||
|
||||
/**********FLASH**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
rockchip,dis-u2-susphy;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C1_M1 */
|
||||
&i2c1 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,250 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
//#include "rv1106-tb-nofastae-emmc.dtsi"
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb-v10.dtsi"
|
||||
#include "rv1106-thunder-boot-emmc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Ultra";
|
||||
compatible = "rockchip,rv1106g-evb1-v11", "rockchip,rv1106";
|
||||
chosen {
|
||||
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** audio ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** emmc *******************************/
|
||||
&emmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** csi ********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3338_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
rockchip,amp-shared;
|
||||
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3338: sc3338@30 {
|
||||
compatible = "smartsens,sc3338";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "FKO1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3338_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
memory-region-thunderboot = <&rkisp_thunderboot>; //thunderboot
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/***************************** ethernet ****************************/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** fiq ********************************/
|
||||
&fiq_debugger {
|
||||
rockchip,baudrate = <115200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer>;
|
||||
};
|
||||
|
||||
/***************************** usb ********************************/
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&u2phy>;
|
||||
//dr_mode = "peripheral";//for rndis
|
||||
dr_mode = "otg"; //for uvc
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** other ******************************/
|
||||
&mailbox {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/********************** thunder-boot ******************************/
|
||||
&thunder_boot_service {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_thunderboot {
|
||||
/* reg's offset MUST match with RTOS */
|
||||
/*
|
||||
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
|
||||
* e.g. 2304x1296: 0xf30000
|
||||
*/
|
||||
reg = <0x00860000 0xf30000>;
|
||||
};
|
||||
|
||||
&ramdisk_r {
|
||||
reg = <0x1790000 (40 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&ramdisk_c {
|
||||
reg = <0x3f90000 (20 * 0x00100000)>;
|
||||
};
|
||||
@@ -1,147 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-luckfox-pico-ultra-ipc.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Ultra W";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
|
||||
restart-poweroff {
|
||||
compatible = "restart-poweroff";
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
uart_rts_gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,wake_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********EMMC**********/
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
// mmc-hs200-1_8v;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
memory-region-ecsd = <&mmc_ecsd>;
|
||||
post-power-on-delay-ms = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SDIO-WIFI**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
// no-sd;
|
||||
// no-mmc;
|
||||
supports-sdio;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl{
|
||||
sdmmc0{
|
||||
sdmmc0_det: sdmmc0-det {
|
||||
rockchip,pins =
|
||||
/* sdmmc0_det */
|
||||
<3 RK_PA1 1 &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
#dr_mode = "host";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********BT**********/
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
@@ -1,81 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-luckfox-pico-ultra-ipc.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Ultra";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********EMMC**********/
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
// mmc-hs200-1_8v;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
memory-region-ecsd = <&mmc_ecsd>;
|
||||
post-power-on-delay-ms = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
@@ -1,20 +0,0 @@
|
||||
#!/bin/sh
|
||||
|
||||
load_luckfoxconfig() {
|
||||
if [ -f /usr/bin/luckfox-config ]; then
|
||||
luckfox-config load
|
||||
fi
|
||||
if [ "$(cat /proc/device-tree/model)" == "Luckfox Pico Ultra" ] ||
|
||||
[ "$(cat /proc/device-tree/model)" == "Luckfox Pico Ultra W" ]; then
|
||||
luckfox_switch_rgb_resolution &
|
||||
fi
|
||||
}
|
||||
|
||||
case $1 in
|
||||
start)
|
||||
load_luckfoxconfig
|
||||
;;
|
||||
*)
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
@@ -1,206 +0,0 @@
|
||||
#!/bin/bash
|
||||
LUCKFOX_FDT_DTB=/tmp/.fdt.dtb
|
||||
LUCKFOX_FDT_HDR_DTB=/tmp/.fdt_header.dtb
|
||||
LUCKFOX_FDT_HDR_OVERLAY_DTS=/tmp/.fdt_header_overlay.dts
|
||||
LUCKFOX_FDT_HDR_OVERLAY_DTBO=/tmp/.fdt_header_overlay.dtbo
|
||||
|
||||
LUCKFOX_FDT_DUMP_TXT=/tmp/.fdt_dump.txt
|
||||
LF_CUSTOM_DTS_PATH="/mnt/cfg"
|
||||
SYS_OVERLAYS_PATH="/sys/kernel/config/device-tree/overlays"
|
||||
LUCKFOX_CHIP_MEDIA_CLASS="emmc"
|
||||
LUCKFOX_CHIP_MEDIA="/dev/mmcblk0p4"
|
||||
|
||||
function luckfox_tools_check() {
|
||||
if ! command -v dialog &>/dev/null; then
|
||||
echo "The dialog is not installed "
|
||||
exit
|
||||
fi
|
||||
|
||||
if ! command -v dtc &>/dev/null; then
|
||||
echo "The dtc is not installed"
|
||||
exit
|
||||
fi
|
||||
|
||||
# get media class dev
|
||||
if [[ -e /dev/mmcblk0p4 ]]; then
|
||||
LUCKFOX_CHIP_MEDIA_CLASS="emmc"
|
||||
LUCKFOX_CHIP_MEDIA=/dev/mmcblk0p4
|
||||
elif [[ -e /dev/mmcblk1p4 ]]; then
|
||||
LUCKFOX_CHIP_MEDIA_CLASS="sdmmc"
|
||||
LUCKFOX_CHIP_MEDIA=/dev/mmcblk1p4
|
||||
luckfox_set_pin_parameter "SDMMC" 1
|
||||
elif [[ -e /dev/mtdblock3 ]]; then
|
||||
LUCKFOX_CHIP_MEDIA_CLASS="spi_nand"
|
||||
LUCKFOX_CHIP_MEDIA=/dev/mtdblock3
|
||||
else
|
||||
LUCKFOX_CHIP_MEDIA_CLASS="unknown"
|
||||
echo "Do not know the storage medium of Luckfox!"
|
||||
exit
|
||||
fi
|
||||
|
||||
}
|
||||
|
||||
# -- Static Overlay --
|
||||
function luckfox_sha256_convert() {
|
||||
local sha256_hash=$1
|
||||
local formatted_hash=""
|
||||
|
||||
for ((i = 0; i < ${#sha256_hash}; i += 8)); do
|
||||
formatted_hash+="0x${sha256_hash:$i:8} "
|
||||
done
|
||||
|
||||
echo "$formatted_hash"
|
||||
}
|
||||
|
||||
function luckfox_update_fdt() {
|
||||
# get fdt_header
|
||||
local origin_fdt_size_hex origin_fdt_size
|
||||
dd if=$LUCKFOX_CHIP_MEDIA of=$LUCKFOX_FDT_HDR_DTB bs=1 skip=0 count=2048 >/dev/null 2>&1
|
||||
|
||||
# get size
|
||||
if [ ! -f $LUCKFOX_FDT_HDR_DTB ]; then
|
||||
echo "$LUCKFOX_FDT_HDR_DTB can't be found!"
|
||||
return
|
||||
fi
|
||||
origin_fdt_size_hex=$(fdtdump $LUCKFOX_FDT_HDR_DTB | grep -A 5 "fdt {" | grep "data-size" | awk '{print $3}' | tr -d ';<>')
|
||||
origin_fdt_size=$(printf "%d\n" "$origin_fdt_size_hex")
|
||||
|
||||
# get fdt dtb
|
||||
dd if=$LUCKFOX_CHIP_MEDIA of=$LUCKFOX_FDT_DTB bs=1 skip=2048 count="$origin_fdt_size" >/dev/null 2>&1
|
||||
|
||||
# create fdt dump
|
||||
if [ ! -f $LUCKFOX_FDT_DTB ]; then
|
||||
echo "$LUCKFOX_FDT_DTB can't be found!"
|
||||
return
|
||||
fi
|
||||
fdtdump $LUCKFOX_FDT_DTB >$LUCKFOX_FDT_DUMP_TXT
|
||||
}
|
||||
|
||||
function luckfox_fdt_overlay() {
|
||||
#region
|
||||
local fdt_overlay_dtbo="$1"
|
||||
local fdt_dtb_size fdt_size fdt_size_hex fdt_hash_data
|
||||
|
||||
fdtoverlay -i $LUCKFOX_FDT_DTB -o $LUCKFOX_FDT_DTB "$fdt_overlay_dtbo" >/dev/null 2>&1
|
||||
fdt_dtb_size=$(ls -la $LUCKFOX_FDT_DTB | awk '{print $5}')
|
||||
|
||||
kernel_offset=$(fdtdump $LUCKFOX_FDT_HDR_DTB | grep -A 2 "kernel {" | grep "data-position" | sed -n 's/.*<\(0x[0-9a-fA-F]*\)>.*/\1/p')
|
||||
fdt_offset=$(fdtdump $LUCKFOX_FDT_HDR_DTB | grep -A 2 "fdt {" | grep "data-position" | sed -n 's/.*<\(0x[0-9a-fA-F]*\)>.*/\1/p')
|
||||
|
||||
kernel_offset_dec=$((kernel_offset))
|
||||
fdt_offset_dec=$((fdt_offset))
|
||||
result_dec=$((kernel_offset_dec - fdt_offset_dec))
|
||||
|
||||
if [ $result_dec -lt "$fdt_dtb_size" ]; then
|
||||
echo "Kernel will be affected !"
|
||||
fi
|
||||
|
||||
dd if=$LUCKFOX_FDT_DTB of=$LUCKFOX_CHIP_MEDIA bs=1 seek=2048 count="$fdt_dtb_size" >/dev/null 2>&1
|
||||
|
||||
# fdt header
|
||||
if [ ! -f $LUCKFOX_FDT_DTB ]; then
|
||||
echo "$LUCKFOX_FDT_DTB can't be found!"
|
||||
return
|
||||
fi
|
||||
fdt_size=$(ls -la $LUCKFOX_FDT_DTB | awk '{print $5}')
|
||||
fdt_size_hex=$(printf "%x\n" "$fdt_size")
|
||||
fdt_hash_data=$(luckfox_sha256_convert "$(sha256sum $LUCKFOX_FDT_DTB | awk '{print $1}')")
|
||||
fdt_header_content="
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&{/images/fdt}{
|
||||
data-size=<0x$fdt_size_hex>;
|
||||
hash{
|
||||
value=<$fdt_hash_data>;
|
||||
};
|
||||
};
|
||||
"
|
||||
echo "$fdt_header_content" >$LUCKFOX_FDT_HDR_OVERLAY_DTS
|
||||
dtc -I dts -O dtb $LUCKFOX_FDT_HDR_OVERLAY_DTS -o $LUCKFOX_FDT_HDR_OVERLAY_DTBO
|
||||
if [ ! -f $LUCKFOX_FDT_HDR_OVERLAY_DTBO ]; then
|
||||
echo "$LUCKFOX_FDT_HDR_OVERLAY_DTBO can't found!"
|
||||
return
|
||||
fi
|
||||
fdtoverlay -i $LUCKFOX_FDT_HDR_DTB -o $LUCKFOX_FDT_HDR_DTB $LUCKFOX_FDT_HDR_OVERLAY_DTBO >/dev/null 2>&1
|
||||
dd if=$LUCKFOX_FDT_HDR_DTB of=$LUCKFOX_CHIP_MEDIA bs=1 seek=0 count=2048 >/dev/null 2>&1
|
||||
#endregion
|
||||
}
|
||||
|
||||
# Load the device tree dynamically
|
||||
function luckfox_load_dynamic_dts() {
|
||||
local dtbo_node_name
|
||||
|
||||
if [ ! -d ${LF_CUSTOM_DTS_PATH}/dtbo/ ]; then
|
||||
exit 1
|
||||
#echo "Can't find ${LF_CUSTOM_DTS_PATH}/dtbo dir !"
|
||||
fi
|
||||
|
||||
for dts_file in ${LF_CUSTOM_DTS_PATH}/dtbo/*.dts; do
|
||||
#Get DTBO name
|
||||
dtbo_node_name="$(basename "$dts_file" .dts)"
|
||||
#Check DTBO path
|
||||
if [ -d "${SYS_OVERLAYS_PATH}/${dtbo_node_name}" ]; then
|
||||
echo "Node is exist"
|
||||
continue
|
||||
fi
|
||||
|
||||
#DTS->DTBO
|
||||
dtc -I dts -O dtb ${LF_CUSTOM_DTS_PATH}/dtbo/${dtbo_node_name}.dts -o \
|
||||
${LF_CUSTOM_DTS_PATH}/dtbo/${dtbo_node_name}.dtbo
|
||||
|
||||
if [ ! -f "${LF_CUSTOM_DTS_PATH}/dtbo/${dtbo_node_name}.dtbo" ]; then
|
||||
echo "${dtbo_node_name}.dts to dtbo error!"
|
||||
continue
|
||||
else
|
||||
mkdir -p ${SYS_OVERLAYS_PATH}/${dtbo_node_name}
|
||||
fi
|
||||
#Load and enable DTBO
|
||||
cat ${LF_CUSTOM_DTS_PATH}/dtbo/${dtbo_node_name}.dtbo > \
|
||||
${SYS_OVERLAYS_PATH}/${dtbo_node_name}/dtbo
|
||||
echo 1 >${SYS_OVERLAYS_PATH}/${dtbo_node_name}/status
|
||||
|
||||
rm ${LLF_CUSTOM_DTS_PATH}/dtbo/${dtbo_node_name}.dtbo
|
||||
done
|
||||
}
|
||||
|
||||
#Overwrite the disk device tree (requires restart)
|
||||
function luckfox_load_static_dts() {
|
||||
local dtbo_node_name
|
||||
if [ ! -d ${LF_CUSTOM_DTS_PATH}/fdt_overlay/ ]; then
|
||||
echo "Can't find ${LF_CUSTOM_DTS_PATH}/fdt_overlay dir!"
|
||||
fi
|
||||
|
||||
for dts_file in ${LF_CUSTOM_DTS_PATH}/fdt_overlay/*.dts; do
|
||||
#Get DTBO name
|
||||
dtbo_node_name="$(basename "$dts_file" .dts)"
|
||||
|
||||
#DTS->DTBO
|
||||
dtc -I dts -O dtb ${LF_CUSTOM_DTS_PATH}/fdt_overlay/${dtbo_node_name}.dts -o \
|
||||
${LF_CUSTOM_DTS_PATH}/fdt_overlay/${dtbo_node_name}.dtbo
|
||||
|
||||
if [ ! -f "${LF_CUSTOM_DTS_PATH}/fdt_overlay/${dtbo_node_name}.dtbo" ]; then
|
||||
echo "${dtbo_node_name}.dts to dtbo error!"
|
||||
continue
|
||||
fi
|
||||
|
||||
# load to disk
|
||||
luckfox_update_fdt
|
||||
luckfox_fdt_overlay ${LF_CUSTOM_DTS_PATH}/fdt_overlay/${dtbo_node_name}.dtbo
|
||||
rm ${LUCKFOX_FDT_OVERLAY_DTBO}
|
||||
|
||||
done
|
||||
}
|
||||
|
||||
case $1 in
|
||||
start)
|
||||
luckfox_load_dynamic_dts
|
||||
;;
|
||||
stop)
|
||||
luckfox_tools_check
|
||||
luckfox_load_static_dts
|
||||
;;
|
||||
*)
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
@@ -1,69 +0,0 @@
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <fcntl.h>
|
||||
#include <unistd.h>
|
||||
#include <linux/input.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <dirent.h>
|
||||
|
||||
#define INPUT_DIR "/dev/input"
|
||||
#define EVENT_PREFIX "event"
|
||||
|
||||
void check_adc_keys_event(const char *device_path) {
|
||||
int fd;
|
||||
char name[256] = "Unknown";
|
||||
struct input_event ev;
|
||||
|
||||
fd = open(device_path, O_RDONLY);
|
||||
if (fd < 0) {
|
||||
perror("Unable to open device");
|
||||
return;
|
||||
}
|
||||
|
||||
if (ioctl(fd, EVIOCGNAME(sizeof(name)), name) < 0) {
|
||||
perror("Unable to get device name");
|
||||
close(fd);
|
||||
return;
|
||||
}
|
||||
|
||||
if (strstr(name, "adc-keys") != NULL) {
|
||||
printf("Found ADC keys device: %s\n", device_path);
|
||||
|
||||
while (read(fd, &ev, sizeof(struct input_event)) > 0) {
|
||||
if (ev.type == EV_KEY) {
|
||||
if (ev.value == 0) {
|
||||
printf("Key released: code %d\n", ev.code);
|
||||
system("luckfox-config rgb_switch");
|
||||
system("reboot");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
close(fd);
|
||||
}
|
||||
|
||||
int main() {
|
||||
struct dirent *entry;
|
||||
DIR *dp;
|
||||
|
||||
|
||||
dp = opendir(INPUT_DIR);
|
||||
if (dp == NULL) {
|
||||
perror("Unable to open /dev/input directory");
|
||||
return EXIT_FAILURE;
|
||||
}
|
||||
|
||||
while ((entry = readdir(dp))) {
|
||||
if (strncmp(entry->d_name, EVENT_PREFIX, strlen(EVENT_PREFIX)) == 0) {
|
||||
char device_path[256];
|
||||
snprintf(device_path, sizeof(device_path), "%s/%s", INPUT_DIR, entry->d_name);
|
||||
check_adc_keys_event(device_path);
|
||||
}
|
||||
}
|
||||
|
||||
closedir(dp);
|
||||
return EXIT_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -1,9 +0,0 @@
|
||||
#!/bin/bash
|
||||
|
||||
/usr/bin/filesystem_resize.sh
|
||||
/etc/init.d/S50usbdevice start
|
||||
luckfox-config load
|
||||
if [ -n "$(hwclock | grep "invalid")" ]; then
|
||||
date -s 2024-01-01
|
||||
hwclock -w
|
||||
fi
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@@ -1 +0,0 @@
|
||||
libfdt.so.1.7.0
|
||||
Binary file not shown.
@@ -1,172 +0,0 @@
|
||||
From 816477167f7fec38674690a576a9f17100707441 Mon Sep 17 00:00:00 2001
|
||||
From: luckfox-eng29 <eng29@luckfox.com>
|
||||
Date: Wed, 21 Aug 2024 14:35:48 +0800
|
||||
Subject: [PATCH] uboot compatible luckfox
|
||||
|
||||
---
|
||||
.../arm/include/asm/arch-rockchip/boot_mode.h | 2 ++
|
||||
.../u-boot/arch/arm/mach-rockchip/boot_mode.c | 19 +++++++++++++++----
|
||||
sysdrv/source/uboot/u-boot/common/autoboot.c | 3 ++-
|
||||
sysdrv/source/uboot/u-boot/common/image-fit.c | 14 +++++++++++---
|
||||
sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c | 5 +++++
|
||||
.../source/uboot/u-boot/include/boot_rkimg.h | 3 ++-
|
||||
6 files changed, 37 insertions(+), 9 deletions(-)
|
||||
|
||||
diff --git a/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h b/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h
|
||||
index 063fd6b47..a34ec828f 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h
|
||||
+++ b/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h
|
||||
@@ -28,6 +28,8 @@
|
||||
/* enter bootrom download mode */
|
||||
#define BOOT_BROM_DOWNLOAD 0xEF08A53C
|
||||
|
||||
+#define BOOT_TO_UBOOT (REBOOT_FLAG + 16)
|
||||
+
|
||||
#ifndef __ASSEMBLY__
|
||||
int setup_boot_mode(void);
|
||||
#endif
|
||||
diff --git a/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c b/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c
|
||||
index 6f4858bba..cd8b65f25 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c
|
||||
+++ b/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c
|
||||
@@ -194,7 +194,7 @@ int rockchip_get_boot_mode(void)
|
||||
boot_mode[PL] = BOOT_MODE_CHARGING;
|
||||
clear_boot_reg = 1;
|
||||
break;
|
||||
- case BOOT_PANIC:
|
||||
+ case BOOT_PANIC:
|
||||
printf("boot mode: panic\n");
|
||||
boot_mode[PL] = BOOT_MODE_PANIC;
|
||||
break;
|
||||
@@ -203,9 +203,14 @@ int rockchip_get_boot_mode(void)
|
||||
boot_mode[PL] = BOOT_MODE_WATCHDOG;
|
||||
break;
|
||||
case BOOT_QUIESCENT:
|
||||
- printf("boot mode: quiescent\n");
|
||||
- boot_mode[PL] = BOOT_MODE_QUIESCENT;
|
||||
- break;
|
||||
+ printf("boot mode: quiescent\n");
|
||||
+ boot_mode[PL] = BOOT_MODE_QUIESCENT;
|
||||
+ break;
|
||||
+ case BOOT_TO_UBOOT:
|
||||
+ printf("boot mode: uboot\n");
|
||||
+ boot_mode[PL] = BOOT_MODE_UBOOT_TERMINAL;
|
||||
+ clear_boot_reg = 1;
|
||||
+ break;
|
||||
default:
|
||||
printf("boot mode: None\n");
|
||||
boot_mode[PL] = BOOT_MODE_UNDEFINE;
|
||||
@@ -231,6 +236,8 @@ int setup_boot_mode(void)
|
||||
{
|
||||
char env_preboot[256] = {0};
|
||||
|
||||
+ env_set("cli", NULL); /* removed by default */
|
||||
+
|
||||
switch (rockchip_get_boot_mode()) {
|
||||
case BOOT_MODE_BOOTLOADER:
|
||||
printf("enter fastboot!\n");
|
||||
@@ -263,6 +270,10 @@ int setup_boot_mode(void)
|
||||
printf("enter charging!\n");
|
||||
env_set("preboot", "setenv preboot; charge");
|
||||
break;
|
||||
+ case BOOT_MODE_UBOOT_TERMINAL:
|
||||
+ printf("enter uboot!\n");
|
||||
+ env_set("cli", "yes");
|
||||
+ break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
diff --git a/sysdrv/source/uboot/u-boot/common/autoboot.c b/sysdrv/source/uboot/u-boot/common/autoboot.c
|
||||
index c64d566d1..9cf947b98 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/common/autoboot.c
|
||||
+++ b/sysdrv/source/uboot/u-boot/common/autoboot.c
|
||||
@@ -220,7 +220,8 @@ static int __abortboot(int bootdelay)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_ROCKCHIP
|
||||
- if (!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) { /* we press ctrl+c ? */
|
||||
+// if (!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) { /* we press ctrl+c ? */
|
||||
+ if ((!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) || env_get("cli")) { /* we press ctrl+c ? */
|
||||
#else
|
||||
/*
|
||||
* Check if key already pressed
|
||||
diff --git a/sysdrv/source/uboot/u-boot/common/image-fit.c b/sysdrv/source/uboot/u-boot/common/image-fit.c
|
||||
index 0ee9eab69..632551b88 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/common/image-fit.c
|
||||
+++ b/sysdrv/source/uboot/u-boot/common/image-fit.c
|
||||
@@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#include <u-boot/sha1.h>
|
||||
#include <u-boot/sha256.h>
|
||||
|
||||
+#define FDT_DEFAULT_LOAD_ADDR 0x00c00000
|
||||
#define __round_mask(x, y) ((__typeof__(x))((y)-1))
|
||||
#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)
|
||||
|
||||
@@ -2140,7 +2141,13 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
|
||||
ret = fit_image_select(fit, noffset, images->verify);
|
||||
if (ret) {
|
||||
bootstage_error(bootstage_id + BOOTSTAGE_SUB_HASH);
|
||||
- return ret;
|
||||
+ /* Use the memory fdt directly */
|
||||
+ printf(" Use the memory fdt directly\n");
|
||||
+ *datap = FDT_DEFAULT_LOAD_ADDR;
|
||||
+ fit_image_get_data_size(fit, noffset, (int *)&size);
|
||||
+ *lenp = (ulong)size;
|
||||
+ return noffset;
|
||||
+ //return ret;
|
||||
}
|
||||
|
||||
bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
|
||||
@@ -2175,7 +2182,6 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
|
||||
fit_image_check_os(fit, noffset, IH_OS_ARM_TRUSTED_FIRMWARE) ||
|
||||
fit_image_check_os(fit, noffset, IH_OS_OP_TEE) ||
|
||||
fit_image_check_os(fit, noffset, IH_OS_U_BOOT) ||
|
||||
- fit_image_check_os(fit, noffset, IH_OS_QNX) ||
|
||||
fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);
|
||||
|
||||
/*
|
||||
@@ -2261,8 +2267,10 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
|
||||
return -EXDEV;
|
||||
}
|
||||
|
||||
+ //printf(" Loading %s from 0x%08lx to 0x%08lx\n",
|
||||
+ // prop_name, data, load);
|
||||
printf(" Loading %s from 0x%08lx to 0x%08lx\n",
|
||||
- prop_name, data, load);
|
||||
+ prop_name, image_start, load);
|
||||
|
||||
dst = map_sysmem(load, len);
|
||||
memmove(dst, buf, len);
|
||||
diff --git a/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c b/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c
|
||||
index 59805d33a..d352b00a3 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c
|
||||
+++ b/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c
|
||||
@@ -2288,6 +2288,11 @@ int mmc_start_init(struct mmc *mmc)
|
||||
|
||||
/* Test for SD version 2 */
|
||||
err = mmc_send_if_cond(mmc);
|
||||
+ if (err) {
|
||||
+ mmc_go_idle(mmc);
|
||||
+ mmc_get_blk_desc(mmc)->hwpart = 0;
|
||||
+ mmc_send_if_cond(mmc);
|
||||
+ }
|
||||
|
||||
/* Now try to get the SD card's operating condition */
|
||||
err = sd_send_op_cond(mmc);
|
||||
diff --git a/sysdrv/source/uboot/u-boot/include/boot_rkimg.h b/sysdrv/source/uboot/u-boot/include/boot_rkimg.h
|
||||
index 9cb709703..fc8356704 100644
|
||||
--- a/sysdrv/source/uboot/u-boot/include/boot_rkimg.h
|
||||
+++ b/sysdrv/source/uboot/u-boot/include/boot_rkimg.h
|
||||
@@ -20,7 +20,8 @@ enum _boot_mode {
|
||||
BOOT_MODE_WATCHDOG,
|
||||
BOOT_MODE_DFU,
|
||||
BOOT_MODE_QUIESCENT,
|
||||
- BOOT_MODE_UNDEFINE,
|
||||
+ BOOT_MODE_UBOOT_TERMINAL,
|
||||
+ BOOT_MODE_UNDEFINE,
|
||||
};
|
||||
|
||||
struct bootloader_message {
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@@ -1,622 +0,0 @@
|
||||
From 8a7f8dcc33ffb580540df5e1dd02b3d3572cb6ee Mon Sep 17 00:00:00 2001
|
||||
From: luckfox-eng29 <eng29@luckfox.com>
|
||||
Date: Wed, 25 Sep 2024 18:49:11 +0800
|
||||
Subject: [PATCH] patch for 115200 bin
|
||||
|
||||
Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
|
||||
---
|
||||
...rv1106_ddr_924MHz_1500000Baud_tb_v1.15.bin | Bin 0 -> 22632 bytes
|
||||
.../rv1106_ddr_924MHz_1500000Baud_v1.15.bin | Bin 0 -> 22632 bytes
|
||||
.../bin/rv11/rv1106_ddr_924MHz_tb_v1.15.bin | Bin 22632 -> 22632 bytes
|
||||
3 files changed, 0 insertions(+), 0 deletions(-)
|
||||
create mode 100644 sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_tb_v1.15.bin
|
||||
create mode 100644 sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_v1.15.bin
|
||||
|
||||
diff --git a/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_tb_v1.15.bin b/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_tb_v1.15.bin
|
||||
new file mode 100644
|
||||
index 0000000000000000000000000000000000000000..95767c2f7a73114dae8356f9ebbca6a10689ecee
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||||
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diff --git a/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_v1.15.bin b/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_1500000Baud_v1.15.bin
|
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new file mode 100644
|
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index 0000000000000000000000000000000000000000..95767c2f7a73114dae8356f9ebbca6a10689ecee
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zU(>+6By#k0bZ-9gl6pk{JOT402;q4M!w}$RNkTEql|E#IbKknC%%fr6WVWqxmC1+B
|
||||
zr8#ShTZv3Ox^%LPe-@!U^vRrKIblX*77$;EGIy`XXuK9qvtLE<+#md^eDUZ52gmzR
|
||||
zZt6#73(iUIItVg@8k|7mS#x-$;jG7Ky2->yc!8n|zDb&nBy5Q9LOC1xYF-bk*zY@H
|
||||
z`Pw_FZMqH@U<prS`NNh#2h!8EvV(AU3X#60jP#Az{Yl?2d<Qt1RvZ=hp-}Z8YKdQh
|
||||
zo8z37ZHM~5SmY2Jai>%1i`Qj1Y50l^g9g8kqYsjsjLeeXSm4VT9oC6JBhuc%JL3@M
|
||||
z*`sk==yvv)%0T(zLAT!=fiJA$$oE4%er0Yg+-g*Gs-_$qyx5=1%Lm8VBB8zr6Ewn|
|
||||
zv)ES-w|W#uqhHbNW8s$W?GY4>Z;8a-N?<p57<iV!jrvH);Xx?z$hAl1FXk*M2g?U;
|
||||
z(rhuev$fiiNT?m^9Q)R2W)9XC=j1Y8wl)=Xn$;7(_g_D;Y>O*j?M>)dnLp0UbmZjs
|
||||
z`c$>JK=fBazAFDa-=s+@ovN!YKiP{rYTz#PUHSdqE%{vl*XYvV>!zs@4BoO1e}=%A
|
||||
zRJC9D(<WsKa4%QFGga+0|Gpo1U;vN1=XszDx&KYV=rb0R?{mnvmgDT>O4EgL_T83D
|
||||
zVS-O(80U2xQaWJf8`)z+p}ax19b~N(0Ua(L#^i_$g=T{NV<?nA2;)2kXC(N}%I_Nr
|
||||
zaf2xL8?Ov-7DhhzBlxCs!E@{n<onSMVtXKZ+0h%nOUQzotkyJbi8VQm4<dTScL_B+
|
||||
z;2sTPYymkU9_9WIYN6E&9`dy;)2=xNKHOTo0K9(@7!Oj}6aK1Mqyq0+hLfxzb_w*f
|
||||
zP~|LjGFo|QQWPeGGBU5wHPx6wGb5=GSO{Ko+(e)G37(sG#++s?vsCg;5Z4y(Hq#S#
|
||||
zMd3|w+lau=KwMi~-d@^HJiRD)B6wdS1%xI@RKNOCkX7Gtf%$hxOP@+i7kKmZgvZoT
|
||||
z@F}68(DPyH*y9%BS!X@FEaZ!)IdBK|Q;BPZSnE1-INW#<8EU;p!w&?}bisRf#_xih
|
||||
znhwhc;QN8#TR~2t3oCl5uv}Uaz)EtmTeg_>*cLB<R*+VG2J4T&oi4c52sbwrJy1`C
|
||||
zd%1WGe2;}@%=6wJxLN54%whkHkLx0M1fHFKM-iU2IEZ9#1aSiEjkWi~2Lw(a7kx7L
|
||||
zA|pF2@6CZP7;?h$;rUjS4i*iD^eh4348WPNyodBI8*quW!&Nlj>dv@}ujr;R(Rr}<
|
||||
zUHH<A_{xujw+Fd`J^n-CZ5PQXxogn$9X_~i=V8RGuiq(!Z;w`PjO+qEopWxCRH0A6
|
||||
zLG~^B4)uXeih)nS)L4U4aT=b8Ih>7+cov?6-FO!^Q|bg`)&kXgYEAaiWfkjOm7J@N
|
||||
ztFGD1)!kKFTeE4i3SD2Zj=*Z}UbAWK#+rLnC_BF(rF6ymJAbo#w(*ALchx?!YjIiG
|
||||
zJZ@=D)jZB|{c>(o6~`AXS*k(+Rw0|Mj58UpSv_~|wb!nl&E2!6ZsVGJXWUy+!xfrl
|
||||
z78K4bESPSbJFjrgJkzz)*4_gznaAB-Fr#3$3Q;oXJVvsrs!h|Qpy^lIL7UcXuF0uV
|
||||
zLA+*dEUv6uom0i-Y$32s6(kwUEw1Kl%a<<Y%FCBIY|&1Q^fe0I?7Cx3&0R3e%9@Sb
|
||||
znoXN(HbJtYdg^5YaGM1fePu;0v|Dpe426trq>+s^6;*3C-CkR<sp5`06)MlET28u?
|
||||
zQw9AX#HhY&<3<&_si^F_CD#>?)VZO0LzGZe6`L!5s;su6azk_=|G8SF;Hr%l<!m7%
|
||||
zz0!}HHq}(GBi-a&)oW{1=(-xy*kaq7%^ZyI#~>KdSWwv-SG5ahaiv*O&stu<{Ujn+
|
||||
zXe}R$OvXjnz4_kSH7dmacxaAtu58UZu3~j{&89mlpf5R9%SyJ6ZNLiT<1F`XUIWoR
|
||||
z8^>T?>Cigp5ER`Vt3Ul0WBMAcy*gHVbJd-7b=*QS2R7H#a2qRNo@mG5R#x0zw_(ja
|
||||
zT&@x5nD^tJj+90VZ^@~;EpN>1ztWX5XnRvNcX<X~Dal>FX-(CdwbA$IaU*!q$;GYR
|
||||
zSg~$iY?iLs3^NxN&5s%Rw_3evQ?%sA?GTEuc2#p^7J~!vt~+XB$lUT}H{4!cR<ta(
|
||||
z07*G?&rt>#SGpOU6l7vw0bN(a!E&ptsb0(F!Uzig6KQO)k}i+<>iJ2Ej9b>OjlR+f
|
||||
zO^}6frRnH2TBkyswPxcΘwM=?CC<wmZo=AMOc%QrgLqG?DK#-NZgT}}bI&9#QJ
|
||||
z+yseo*VZ))(K3q)P2*6dP*GjIX5%gBHV!Ra4m2r@MW$FZYb073i)SO4tJO94z}B$l
|
||||
zZdc_Rgiz~1q#i>&0fIuY2%gbjR#p~5GV)6#KZF)R5y4^E%Q%SO$jR?N;jkmkpeT-F
|
||||
z^f%HDR6|Oo@-hy%&!FAdZ|u9qjT?U%hrEj+Ke<9N7AG||^*`Z|*Nw#)GcM|KpQD|=
|
||||
zGA^hx+73-{E_ZpP&vGdJ@z`THSLj1pfKiOL6CL|cjZ3LqM7H?oZ|u7i@GcBRgw86}
|
||||
z)i`6@!SD)#GhxEjI8lDd$l$NEla}^VI4n!(gMqx4c^d1^RbwC9&X_(kq|aCN2L?{Y
|
||||
zJ_ZMm#bHPKLn!m(alt%@{-XT>ge^DDN~Qo08e@}`8A|<_X)<kuwB-L20Rc&{!1aX8
|
||||
z(ZraCCfYy@z!ick2g0Mt@o43?9F&-q7!6O*S1L@I#pRN)z@tXHlhP3lI3%<(V{qn8
|
||||
zF;0Q7Wu6+{nLHIKvJ}x!^%FmLWmT2C((SHtyDJgOrjqd=&_k#i-HNV5i_t=KEnKgi
|
||||
zf%4%K!W{T-PB@tUlTaqgK<OwAUbujoj6G;4szXjxhDu;~bI~khgsb^^a1|~)T4VC%
|
||||
z8VGHreu2-Tr@;@m9^HZ*s2FO@L$jmrFu*nL(K@lWyl}${H^9H>Uo?Hg3-ALF1o9+%
|
||||
zfeHd44@r;yG^2^X5fhRpDiZRsjE)~Ae^L^xS%61=q7LB^!5jOI7#dSl1&N!G8F?X|
|
||||
z4OnNR1sHXZ7%F@M5ryg!x=0>=pzWcV6q#fQsgo0w48-GMey|WL7=~6u%xE-7Lt+{+
|
||||
zsStyW6>}sH)5r}m`E4JGcR`F1rPxPejFhbq)5v_>3>{__SYd-0Ls(8?sJ9CSN#e-J
|
||||
zkF@pw=TCv;(f0qld{N5d@-Tcz1l^7PevU7;=vZUp89N4y7%Sn+JeakFFJ+hcqPvPO
|
||||
z2yrQ0BNe}j#>%Vsqli-~2!E6mHNqb{${#t$#rQ)}bc{bV&5^#q`gcRjA@`5?gMX4g
|
||||
zj2y}TQT&m^9D}a?x7SOODtRU)hyS^0gkC?#m%V^Ac1@D^lHVv_?n29>e0laVUo2Pg
|
||||
z#f+SpUC|mE^izC^AD^fqd`TMN3oDZ`WZjJNMNU()C|}^e8Q=ge`x|_r5dD*UQU3$^
|
||||
zq5^3|==0xQFDdGAMoK|n79&5$mo#9?&+%mkaz^=b@-kl>KjKU6q!?e)ev&VV85%X=
|
||||
zODauA*Najn|1n?WgfH|6U*vz2FU<dSzQFfz|0BMPPe?P<?0=0fM85wVU-rXo6|#?=
|
||||
zzs#3gf5ey6tQcRo5x&G-wT~rdCB+lIOc>#dN~VyJ^`hWn`<Q~J6j8n~G8tJfiV?o#
|
||||
zpuJb^V>FWeBwsZD!1WT3l>Z~Xq-!$EX}C`JU)jev=I8m+4*NXe3k?D`Cih)G;!Ac?
|
||||
zj4!z(d{JM;m(=VO_yhx?bcTtpm$(tWup@k7nHXQ-AR!;i7X$kJ|8smvfE^5m65YoL
|
||||
zZAqF0@&ncCXMbexV^v8NSOyXX(uMH&xqZww((q{eqm66aOk)*f{=VF2P}fMMn0!eB
|
||||
zOB_Ok-`^29#AEd|d7M0|r;X|XDp)6E{ix06s2(7v=$O2L&-OWh({VJN4KWMy$qlg?
|
||||
zNU<Ga@+0~hd@=fy>*#+&A5e{1FNC(F8zWu$FYzTcetZ=rqrj;LbcIdo=lDY83;B(<
|
||||
zKN@RLj4yvrzF;Pm?uxd6M%K&E^Ccl8;VO9(CzD^r7w}F;<qb6|Z{p<gC|~Hm#g~7a
|
||||
z+)@7z`7$9fV;wDz@x}6Y_%eEa9OcJoJj$29Ctom=EsODm{V(xFla-Lbz)MEuje2BX
|
||||
z8(l9fO~>R7JtA-76bix@<=^DXKThuaPxrC(<Vox45q-@5clbi~8}b|F$7nptm%k@p
|
||||
zFf&WhMH)b(dh(Cf3)mpW?qf;Wny9?V7?C&ea#lWeA5$_k8`A?u<W2m~^Myh3pWMe%
|
||||
z{}=QD4FW$WjFiZV|IR)(F;#m9qln4<a-jRq?PINfhc8~VD=PQ(m*xIlSIK?Mn3Y}7
|
||||
zPXsoSucGnK^CcxWIf<;7i6eYTkSnj^i;AI@WBJ0yvn*LJD(0v6F$OGxKV=U{`(NNo
|
||||
vGE$>q9Q(UO#r_7tQBD3rZ0xVz9sBc`V}GA>vA-WQu|N2)R-%6+QRM#vdgy2c
|
||||
|
||||
literal 0
|
||||
HcmV?d00001
|
||||
|
||||
diff --git a/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_tb_v1.15.bin b/sysdrv/source/uboot/rkbin/bin/rv11/rv1106_ddr_924MHz_tb_v1.15.bin
|
||||
index 95767c2f7a73114dae8356f9ebbca6a10689ecee..561ee68249c2d41d8d300baad7d0aff8b2728ee2 100644
|
||||
GIT binary patch
|
||||
delta 18
|
||||
acmaE{f$_x##tkN}%nXMZH=DZ}3IhO3qXv}#
|
||||
|
||||
delta 18
|
||||
acmaE{f$_x##tkN}%n6UhHk-Q|3IhO82nQ<w
|
||||
|
||||
--
|
||||
2.34.1
|
||||
|
||||
@@ -1,122 +0,0 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
|
||||
CONFIG_ROCKCHIP_RV1106=y
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_ROCKCHIP_META=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
# CONFIG_ROCKCHIP_SET_SN is not set
|
||||
# CONFIG_ROCKCHIP_SET_ETHADDR is not set
|
||||
CONFIG_LOADER_INI="RV1106MINIALL_SPI_NAND_TB.ini"
|
||||
CONFIG_TRUST_INI="RV1106TOS_TB.ini"
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RV1106=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rv1106-luckfox-spi-nand-tb"
|
||||
CONFIG_DEBUG_UART=y
|
||||
# CONFIG_DISTRO_DEFAULTS is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_SPL_FIT_IMAGE_KB=512
|
||||
CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_SKIP_RELOCATE_UBOOT is not set
|
||||
CONFIG_SPL_ADC_SUPPORT=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_KERNEL_BOOT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SOURCE is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_NET is not set
|
||||
# CONFIG_CMD_NFS is not set
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_MTD_BLK=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
|
||||
CONFIG_ENVF=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_SPL_BLK_READ_PREPARE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
# CONFIG_DM_I2C is not set
|
||||
CONFIG_SPL_INPUT=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_SPL_ADC_KEY=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_SPL_MISC_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_DM_MMC is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0x1
|
||||
CONFIG_SF_DEFAULT_SPEED=50000000
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_XMC=y
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_DM_REGULATOR is not set
|
||||
# CONFIG_DM_PWM is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_BAUDRATE=1500000
|
||||
CONFIG_DEBUG_UART_BASE=0xff4c0000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_SYSRESET_SYSCON_REBOOT is not set
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
@@ -1,144 +0,0 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
|
||||
CONFIG_ROCKCHIP_RV1106=y
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_ROCKCHIP_CMD="sd_update -"
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RV1106=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rv1106-evb"
|
||||
CONFIG_DEBUG_UART=y
|
||||
# CONFIG_DISTRO_DEFAULTS is not set
|
||||
CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
CONFIG_FIT=y
|
||||
# CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_SPL_FIT_IMAGE_KB=256
|
||||
CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
# CONFIG_SKIP_RELOCATE_UBOOT is not set
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_AB=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_RANDOM_UUID=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_PART=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
CONFIG_CMD_SCRIPT_UPDATE=y
|
||||
# CONFIG_CMD_SOURCE is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_PING=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_FAT=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
|
||||
CONFIG_ENVF=y
|
||||
CONFIG_ENVF_LIST="blkdevparts mtdparts sys_bootargs app reserved ipaddr serverip netmask gatewayip ethaddr"
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
# CONFIG_DM_I2C is not set
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
|
||||
# CONFIG_SUPPORT_EMMC_RPMB is not set
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_PHY_RK630=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
# CONFIG_DWC_ETH_QOS_FULL is not set
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_DM_REGULATOR is not set
|
||||
# CONFIG_DM_PWM is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff4c0000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_SYSRESET_SYSCON_REBOOT is not set
|
||||
# CONFIG_FAT_WRITE is not set
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
# CONFIG_REGEX is not set
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_SPL_LZMA=y
|
||||
CONFIG_SPL_GZIP=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
@@ -1,119 +0,0 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x100000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
|
||||
CONFIG_ROCKCHIP_RV1106=y
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_ROCKCHIP_META=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
# CONFIG_ROCKCHIP_SET_SN is not set
|
||||
# CONFIG_ROCKCHIP_SET_ETHADDR is not set
|
||||
CONFIG_LOADER_INI="RV1106MINIALL_EMMC_TB.ini"
|
||||
CONFIG_TRUST_INI="RV1106TOS_TB.ini"
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RV1106=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rv1106-luckfox-emmc-tb"
|
||||
CONFIG_DEBUG_UART=y
|
||||
# CONFIG_DISTRO_DEFAULTS is not set
|
||||
CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_TPL_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_SPL_FIT_IMAGE_KB=256
|
||||
CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
# CONFIG_SKIP_RELOCATE_UBOOT is not set
|
||||
CONFIG_SPL_ADC_SUPPORT=y
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_KERNEL_BOOT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_RANDOM_UUID=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PART=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SOURCE is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_NET is not set
|
||||
# CONFIG_CMD_NFS is not set
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
|
||||
CONFIG_ENVF=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_SPL_BLK_READ_PREPARE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
# CONFIG_DM_I2C is not set
|
||||
CONFIG_SPL_INPUT=y
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_SPL_ADC_KEY=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_SPL_MISC_DECOMPRESS=y
|
||||
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
|
||||
# CONFIG_SUPPORT_EMMC_RPMB is not set
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_USE_PRE_CONFIG=y
|
||||
CONFIG_SF_DEFAULT_MODE=0x3
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_DM_REGULATOR is not set
|
||||
# CONFIG_DM_PWM is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_RESET_ROCKCHIP=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff4c0000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_SYSRESET_SYSCON_REBOOT is not set
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
@@ -1,129 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-u-boot.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RV1106 EVB2 Board";
|
||||
compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
u-boot,spl-boot-order = &spi_nor, &emmc;
|
||||
};
|
||||
|
||||
adc-keys {
|
||||
compatible = "adc-keys";
|
||||
io-channels = <&saradc 0>;
|
||||
io-channel-names = "buttons";
|
||||
poll-interval = <100>;
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
|
||||
volumeup-key {
|
||||
u-boot,dm-spl;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
label = "volume up";
|
||||
press-threshold-microvolt = <0>;
|
||||
};
|
||||
|
||||
volumedown-key {
|
||||
u-boot,dm-spl;
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
label = "volume down";
|
||||
press-threshold-microvolt = <400781>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&hw_decompress {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
//&gmac {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&mdio {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pinctrl {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pcfg_pull_up_drv_level_2 {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pcfg_pull_up {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&gpio3 {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&rmii_phy {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&rng {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
&saradc {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_bus4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_clk {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_cmd {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_det {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&spi_nand {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&spi_nor {
|
||||
spi-max-frequency = <125000000>;
|
||||
};
|
||||
@@ -1,131 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-u-boot.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RV1106 EVB2 Board";
|
||||
compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
u-boot,spl-boot-order = &spi_nand, &emmc;
|
||||
};
|
||||
|
||||
adc-keys {
|
||||
compatible = "adc-keys";
|
||||
io-channels = <&saradc 0>;
|
||||
io-channel-names = "buttons";
|
||||
poll-interval = <100>;
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
|
||||
volumeup-key {
|
||||
u-boot,dm-spl;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
label = "volume up";
|
||||
press-threshold-microvolt = <0>;
|
||||
};
|
||||
|
||||
volumedown-key {
|
||||
u-boot,dm-spl;
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
label = "volume down";
|
||||
press-threshold-microvolt = <400781>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&hw_decompress {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
//&gmac {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&mdio {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pinctrl {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pcfg_pull_up_drv_level_2 {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&pcfg_pull_up {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&gpio3 {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&rmii_phy {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
//&rng {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
&saradc {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_bus4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_clk {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_cmd {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&sdmmc0_det {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
//&spi_nand {
|
||||
// /delete-property/ u-boot,dm-spl;
|
||||
// status = "disabled";
|
||||
//};
|
||||
|
||||
&spi_nor {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
status = "disabled";
|
||||
//spi-max-frequency = <125000000>;
|
||||
};
|
||||
@@ -1,47 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-u-boot.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RV1106 EVB2 Board";
|
||||
compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
u-boot,spl-boot-order = &sdmmc, &spi_nand, &emmc;
|
||||
};
|
||||
|
||||
adc-keys {
|
||||
compatible = "adc-keys";
|
||||
io-channels = <&saradc 0>;
|
||||
io-channel-names = "buttons";
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
|
||||
volumeup-key {
|
||||
u-boot,dm-spl;
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
label = "volume up";
|
||||
press-threshold-microvolt = <1750>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
&hw_decompress {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
u-boot,dm-spl;
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,144 +0,0 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
|
||||
CONFIG_ROCKCHIP_RV1106=y
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE=y
|
||||
CONFIG_USING_KERNEL_DTB_V2=y
|
||||
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
|
||||
CONFIG_ROCKCHIP_CMD="sd_update -"
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_TARGET_EVB_RV1106=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rv1106-evb"
|
||||
CONFIG_DEBUG_UART=y
|
||||
# CONFIG_DISTRO_DEFAULTS is not set
|
||||
CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
CONFIG_FIT=y
|
||||
# CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_FIT_HW_CRYPTO=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_FIT_HW_CRYPTO=y
|
||||
# CONFIG_SPL_SYS_DCACHE_OFF is not set
|
||||
CONFIG_SPL_FIT_IMAGE_KB=256
|
||||
CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
|
||||
CONFIG_BOOTDELAY=0
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ANDROID_BOOTLOADER=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
|
||||
# CONFIG_SKIP_RELOCATE_UBOOT is not set
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||||
CONFIG_SPL_MMC_WRITE=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_AB=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
CONFIG_RANDOM_UUID=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_BOOT_ANDROID=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_PART=y
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
CONFIG_CMD_SCRIPT_UPDATE=y
|
||||
# CONFIG_CMD_SOURCE is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TFTP_BOOTM=y
|
||||
CONFIG_CMD_TFTP_FLASH=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
# CONFIG_CMD_NFS is not set
|
||||
CONFIG_CMD_PING=y
|
||||
# CONFIG_CMD_MISC is not set
|
||||
CONFIG_CMD_FAT=y
|
||||
# CONFIG_SPL_DOS_PARTITION is not set
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_DTB_MINIMUM=y
|
||||
CONFIG_OF_LIVE=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
|
||||
CONFIG_ENVF=y
|
||||
CONFIG_ENVF_LIST="blkdevparts mtdparts sys_bootargs app reserved ipaddr serverip netmask gatewayip ethaddr"
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SARADC_ROCKCHIP is not set
|
||||
CONFIG_SARADC_ROCKCHIP_V2=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_DM_CRYPTO=y
|
||||
CONFIG_SPL_DM_CRYPTO=y
|
||||
CONFIG_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
|
||||
CONFIG_DM_RNG=y
|
||||
CONFIG_RNG_ROCKCHIP=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
# CONFIG_DM_I2C is not set
|
||||
CONFIG_DM_KEY=y
|
||||
CONFIG_ADC_KEY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_SPL_MISC=y
|
||||
CONFIG_ROCKCHIP_OTP=y
|
||||
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
|
||||
# CONFIG_SUPPORT_EMMC_RPMB is not set
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLK=y
|
||||
CONFIG_MTD_DEVICE=y
|
||||
CONFIG_MTD_SPI_NAND=y
|
||||
CONFIG_PHY_RK630=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_DWC_ETH_QOS=y
|
||||
# CONFIG_DWC_ETH_QOS_FULL is not set
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_DM_REGULATOR is not set
|
||||
# CONFIG_DM_PWM is not set
|
||||
CONFIG_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff4c0000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_ROCKCHIP_SFC=y
|
||||
CONFIG_SYSRESET=y
|
||||
# CONFIG_SYSRESET_SYSCON_REBOOT is not set
|
||||
# CONFIG_FAT_WRITE is not set
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
# CONFIG_REGEX is not set
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_SPL_RSA=y
|
||||
CONFIG_RSA_N_SIZE=0x200
|
||||
CONFIG_RSA_E_SIZE=0x10
|
||||
CONFIG_RSA_C_SIZE=0x20
|
||||
CONFIG_SPL_LZMA=y
|
||||
CONFIG_SPL_GZIP=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
@@ -1,17 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
#include "rv1106-thunder-boot.dtsi"
|
||||
|
||||
/ {
|
||||
thunder_boot_mmc: thunder-boot-mmc {
|
||||
compatible = "rockchip,thunder-boot-mmc";
|
||||
reg = <0xffaa0000 0x4000>;
|
||||
clocks = <&cru HCLK_SDMMC>, <&cru CCLK_SRC_SDMMC>;
|
||||
clock-names = "biu", "ciu";
|
||||
memory-region-src = <&ramdisk_c>;
|
||||
memory-region-dst = <&ramdisk_r>;
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user