Pullrequest mis5001 clear patch 0305 (#242)

* project/app : Add uvc_app_tiny application Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC/overlay : Add Ubuntu system support for Rockit and RKNN libraries Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/of : Add support for dynamic device tree Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/usb/serial : Add CH343 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/staging : Disable partial logging of fbtft Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/pinctrl/pinctrl-rockchip.h : Fix pinctrl configuration failure issue Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/include/dt-bindings/soc/rockchip,boot-mode.h : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/video : Add logo display support for LF40-480480-ARK and LF40-720720-ARK Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/boot/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/configs : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c : Fix the issue where some Micro SD cards fail to boot Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/common/image-fit.c : Add U-Boot support for luckfox-config Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/rkbin/bin/rv11 : Add firmware with a serial baud rate of 115200 and back up the original firmware Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/arch/arm/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/configs : Add defconfig files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/media/i2c : Add MIS5001 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm : Add default support for MIS5001 on Luckfox RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board : Delete irrelevant overwrite files and patch files Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/drv_ko/insmod_ko.sh : Register mis5001 driver during boot process Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * media/isp/release_camera_engine_rkaiq_rv1106_arm-rockchip830-linux-uclibcgnueabihf/isp_iqfiles : Add mis5001 iqfile Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/app/rkipc/rkipc/src/rv1106_ipc : Add rkipc application support for mis5001 sensor Signed-off-by: eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC : Enable default retrieval of mis5001 iqfile and include ROCKIT and RKNN libraries of RV1106 series board Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/build.sh : Remove operations related to applying and deleting patches Signed-off-by: eng29 <eng29@luckfox.com> * project/build.sh : Modify build system menu description; Apply lightweight system processing only during Buildroot and BusyBox system compilation Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board/buildroot/luckfox_pico_w_defconfig : Add pppd and pgrep for 4G module Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/tools/board/kernel/rv1106-luckfox-pico-ultra-ipc.dtsi : Add uart4m1 support for lastest luckfox-config tool Signed-off-by: eng29 <eng29@luckfox.com> --------- Signed-off-by: luckfox-eng29 <eng29@luckfox.com> Signed-off-by: eng29 <eng29@luckfox.com>
2026-01-18 03:28:19 +01:00 · 2025-03-05 17:21:58 +08:00
parent a4230afbf4
commit 485f09ece6
208 changed files with 44172 additions and 15059 deletions
--- a/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox-emmc-tb.dts
+++ b/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox-emmc-tb.dts
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1106.dtsi"
+#include "rv1106-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RV1106 EVB2 Board";
+	compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &spi_nor, &emmc;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <0>;
+		};
+
+		volumedown-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <400781>;
+		};
+	};
+
+};
+
+&hw_decompress {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+//&gmac {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&mdio {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pinctrl {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pcfg_pull_up_drv_level_2 {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pcfg_pull_up {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&gpio3 {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&rmii_phy {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&rng {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&sdmmc {
+	/delete-property/ u-boot,dm-spl;
+	status = "disabled";
+};
+
+&sdmmc0 {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_bus4 {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_clk {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_cmd {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_det {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&spi_nand {
+	/delete-property/ u-boot,dm-spl;
+	status = "disabled";
+};
+
+&spi_nor {
+	spi-max-frequency = <125000000>;
+};
--- a/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox-spi-nand-tb.dts
+++ b/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox-spi-nand-tb.dts
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1106.dtsi"
+#include "rv1106-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RV1106 EVB2 Board";
+	compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &spi_nand, &emmc;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		poll-interval = <100>;
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <0>;
+		};
+
+		volumedown-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEDOWN>;
+			label = "volume down";
+			press-threshold-microvolt = <400781>;
+		};
+	};
+
+};
+
+&hw_decompress {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+//&gmac {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&mdio {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pinctrl {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pcfg_pull_up_drv_level_2 {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&pcfg_pull_up {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&gpio3 {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&rmii_phy {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+//&rng {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&sdmmc {
+	/delete-property/ u-boot,dm-spl;
+	status = "disabled";
+};
+
+&sdmmc0 {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_bus4 {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_clk {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_cmd {
+	/delete-property/ u-boot,dm-spl;
+};
+
+&sdmmc0_det {
+	/delete-property/ u-boot,dm-spl;
+};
+
+//&spi_nand {
+//	/delete-property/ u-boot,dm-spl;
+//	status = "disabled";
+//};
+
+&spi_nor {
+	/delete-property/ u-boot,dm-spl;
+	status = "disabled";
+	//spi-max-frequency = <125000000>;
+};
--- a/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox.dts
+++ b/sysdrv/source/uboot/u-boot/arch/arm/dts/rv1106-luckfox.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1106.dtsi"
+#include "rv1106-u-boot.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip RV1106 EVB2 Board";
+	compatible = "rockchip,rv1106-evb2", "rockchip,rv1106";
+
+	chosen {
+		stdout-path = &uart2;
+		u-boot,spl-boot-order = &sdmmc, &spi_nand, &emmc;
+	};
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&saradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <1800000>;
+		u-boot,dm-spl;
+		status = "okay";
+
+		volumeup-key {
+			u-boot,dm-spl;
+			linux,code = <KEY_VOLUMEUP>;
+			label = "volume up";
+			press-threshold-microvolt = <1750>;
+		};
+
+	};
+};
+
+&hw_decompress {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
+&saradc {
+	u-boot,dm-spl;
+	status = "okay";
+};
--- a/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h
+++ b/sysdrv/source/uboot/u-boot/arch/arm/include/asm/arch-rockchip/boot_mode.h
@@ -28,6 +28,8 @@
 /* enter bootrom download mode */
 #define BOOT_BROM_DOWNLOAD	0xEF08A53C

+#define BOOT_TO_UBOOT   (REBOOT_FLAG + 16)
+
 #ifndef __ASSEMBLY__
 int setup_boot_mode(void);
 #endif
--- a/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c
+++ b/sysdrv/source/uboot/u-boot/arch/arm/mach-rockchip/boot_mode.c
@@ -206,6 +206,11 @@ int rockchip_get_boot_mode(void)
 			printf("boot mode: quiescent\n");
 			boot_mode[PL] = BOOT_MODE_QUIESCENT;
 			break;
+		case BOOT_TO_UBOOT:
+			printf("boot mode: uboot\n");
+			boot_mode[PL] = BOOT_MODE_UBOOT_TERMINAL;
+			clear_boot_reg = 1;
+			break;
 		default:
 			printf("boot mode: None\n");
 			boot_mode[PL] = BOOT_MODE_UNDEFINE;
@@ -231,6 +236,8 @@ int setup_boot_mode(void)
 {
 	char env_preboot[256] = {0};

+	env_set("cli", NULL); /* removed by default */
+
 	switch (rockchip_get_boot_mode()) {
 	case BOOT_MODE_BOOTLOADER:
 		printf("enter fastboot!\n");
@@ -263,6 +270,10 @@ int setup_boot_mode(void)
 		printf("enter charging!\n");
 		env_set("preboot", "setenv preboot; charge");
 		break;
+	case BOOT_MODE_UBOOT_TERMINAL:
+		printf("enter uboot!\n");
+		env_set("cli", "yes");
+		break;
 	}

 	return 0;
--- a/sysdrv/source/uboot/u-boot/common/autoboot.c
+++ b/sysdrv/source/uboot/u-boot/common/autoboot.c
@@ -220,7 +220,8 @@ static int __abortboot(int bootdelay)
 #endif

 #ifdef CONFIG_ARCH_ROCKCHIP
-	if (!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) {	/* we press ctrl+c ? */
+//	if (!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) {	/* we press ctrl+c ? */
+	if ((!IS_ENABLED(CONFIG_CONSOLE_DISABLE_CLI) && ctrlc()) || env_get("cli")) {	/* we press ctrl+c ? */
 #else
 	/*
 	 * Check if key already pressed
--- a/sysdrv/source/uboot/u-boot/common/image-fit.c
+++ b/sysdrv/source/uboot/u-boot/common/image-fit.c
@@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>

+#define FDT_DEFAULT_LOAD_ADDR 0x00c00000
 #define __round_mask(x, y) ((__typeof__(x))((y)-1))
 #define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1)

@@ -2140,7 +2141,13 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 	ret = fit_image_select(fit, noffset, images->verify);
 	if (ret) {
 		bootstage_error(bootstage_id + BOOTSTAGE_SUB_HASH);
-		return ret;
+		/* Use the memory fdt directly */
+		printf("   Use the memory fdt directly\n");
+		*datap = FDT_DEFAULT_LOAD_ADDR;
+		fit_image_get_data_size(fit, noffset, (int *)&size);
+		*lenp = (ulong)size;
+		return noffset;
+		//return ret;
 	}

 	bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
@@ -2175,7 +2182,6 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 		fit_image_check_os(fit, noffset, IH_OS_ARM_TRUSTED_FIRMWARE) ||
 		fit_image_check_os(fit, noffset, IH_OS_OP_TEE) ||
 		fit_image_check_os(fit, noffset, IH_OS_U_BOOT) ||
-		fit_image_check_os(fit, noffset, IH_OS_QNX) ||
 		fit_image_check_os(fit, noffset, IH_OS_OPENRTOS);

 	/*
@@ -2261,8 +2267,10 @@ int fit_image_load_index(bootm_headers_t *images, ulong addr,
 			return -EXDEV;
 		}

+		//printf("   Loading %s from 0x%08lx to 0x%08lx\n",
+		//       prop_name, data, load);
 		printf("   Loading %s from 0x%08lx to 0x%08lx\n",
-		       prop_name, data, load);
+		       prop_name, image_start, load);

 		dst = map_sysmem(load, len);
 		memmove(dst, buf, len);
--- a/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_spi_nand_tb_defconfig
+++ b/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_spi_nand_tb_defconfig
@@ -0,0 +1,122 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_ROCKCHIP_RV1106=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_USING_KERNEL_DTB_V2=y
+CONFIG_ROCKCHIP_META=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+# CONFIG_ROCKCHIP_SET_SN is not set
+# CONFIG_ROCKCHIP_SET_ETHADDR is not set
+CONFIG_LOADER_INI="RV1106MINIALL_SPI_NAND_TB.ini"
+CONFIG_TRUST_INI="RV1106TOS_TB.ini"
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1106=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1106-luckfox-spi-nand-tb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_FIT_IMAGE_KB=512
+CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_ADC_SUPPORT=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_KERNEL_BOOT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_MTD_BLK=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_ENVF=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
+CONFIG_SPL_BLK_READ_PREPARE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_DM_I2C is not set
+CONFIG_SPL_INPUT=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_SPL_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+# CONFIG_MMC is not set
+# CONFIG_DM_MMC is not set
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x1
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PINCTRL=y
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_DM_PWM is not set
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_BASE=0xff4c0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+# CONFIG_SYSRESET_SYSCON_REBOOT is not set
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
--- a/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_uboot_defconfig
+++ b/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_uboot_defconfig
@@ -0,0 +1,144 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_ROCKCHIP_RV1106=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_USING_KERNEL_DTB_V2=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_CMD="sd_update -"
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1106=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1106-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+# CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_FIT_IMAGE_KB=256
+CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_AB=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_ITEST is not set
+CONFIG_CMD_SCRIPT_UPDATE=y
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_ENVF=y
+CONFIG_ENVF_LIST="blkdevparts mtdparts sys_bootargs app reserved ipaddr serverip netmask gatewayip ethaddr"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
+CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_DM_I2C is not set
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_PHY_RK630=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+# CONFIG_DWC_ETH_QOS_FULL is not set
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_DM_PWM is not set
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff4c0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+# CONFIG_SYSRESET_SYSCON_REBOOT is not set
+# CONFIG_FAT_WRITE is not set
+CONFIG_USE_TINY_PRINTF=y
+# CONFIG_REGEX is not set
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
+CONFIG_SPL_LZMA=y
+CONFIG_SPL_GZIP=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
--- a/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_uboot_emmc_tb_defconfig
+++ b/sysdrv/source/uboot/u-boot/configs/luckfox_rv1106_uboot_emmc_tb_defconfig
@@ -0,0 +1,119 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x100000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_ROCKCHIP_RV1106=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_USING_KERNEL_DTB_V2=y
+CONFIG_ROCKCHIP_META=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+# CONFIG_ROCKCHIP_SET_SN is not set
+# CONFIG_ROCKCHIP_SET_ETHADDR is not set
+CONFIG_LOADER_INI="RV1106MINIALL_EMMC_TB.ini"
+CONFIG_TRUST_INI="RV1106TOS_TB.ini"
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1106=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1106-luckfox-emmc-tb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x80000
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_FIT_IMAGE_KB=256
+CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_ADC_SUPPORT=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_KERNEL_BOOT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_ENVF=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
+CONFIG_SPL_BLK_READ_PREPARE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_DM_I2C is not set
+CONFIG_SPL_INPUT=y
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_SPL_ADC_KEY=y
+CONFIG_SPL_MISC=y
+CONFIG_SPL_MISC_DECOMPRESS=y
+CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_USE_PRE_CONFIG=y
+CONFIG_SF_DEFAULT_MODE=0x3
+CONFIG_PINCTRL=y
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_DM_PWM is not set
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_RESET_ROCKCHIP=y
+CONFIG_DEBUG_UART_BASE=0xff4c0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+# CONFIG_SYSRESET_SYSCON_REBOOT is not set
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
--- a/sysdrv/source/uboot/u-boot/configs/rv1106-luckfox_defconfig
+++ b/sysdrv/source/uboot/u-boot/configs/rv1106-luckfox_defconfig
@@ -0,0 +1,144 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_optee.sh"
+CONFIG_ROCKCHIP_RV1106=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_FIT_IMAGE=y
+CONFIG_USING_KERNEL_DTB_V2=y
+CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
+CONFIG_ROCKCHIP_CMD="sd_update -"
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_TARGET_EVB_RV1106=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="rv1106-evb"
+CONFIG_DEBUG_UART=y
+# CONFIG_DISTRO_DEFAULTS is not set
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+# CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_FIT_HW_CRYPTO=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_FIT_HW_CRYPTO=y
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_FIT_IMAGE_KB=256
+CONFIG_SPL_FIT_IMAGE_MULTIPLE=1
+CONFIG_BOOTDELAY=0
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_ANDROID_BOOTLOADER=y
+CONFIG_ANDROID_BOOT_IMAGE_HASH=y
+# CONFIG_SKIP_RELOCATE_UBOOT is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SPL_MMC_WRITE=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_AB=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_RANDOM_UUID=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_BOOT_ANDROID=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+# CONFIG_CMD_ITEST is not set
+CONFIG_CMD_SCRIPT_UPDATE=y
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTP_BOOTM=y
+CONFIG_CMD_TFTP_FLASH=y
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_DTB_MINIMUM=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_U_BOOT_REMOVE_PROPS="interrupt-parent"
+CONFIG_ENVF=y
+CONFIG_ENVF_LIST="blkdevparts mtdparts sys_bootargs app reserved ipaddr serverip netmask gatewayip ethaddr"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SARADC_ROCKCHIP is not set
+CONFIG_SARADC_ROCKCHIP_V2=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_DM_CRYPTO=y
+CONFIG_SPL_DM_CRYPTO=y
+CONFIG_ROCKCHIP_CRYPTO_V2=y
+CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
+CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_DM_I2C is not set
+CONFIG_DM_KEY=y
+CONFIG_ADC_KEY=y
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_ROCKCHIP_OTP=y
+CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_MTD_BLK=y
+CONFIG_MTD_DEVICE=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_PHY_RK630=y
+CONFIG_DM_ETH=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+# CONFIG_DWC_ETH_QOS_FULL is not set
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_DM_PWM is not set
+CONFIG_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_BASE=0xff4c0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+# CONFIG_SYSRESET_SYSCON_REBOOT is not set
+# CONFIG_FAT_WRITE is not set
+CONFIG_USE_TINY_PRINTF=y
+# CONFIG_REGEX is not set
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_RSA_N_SIZE=0x200
+CONFIG_RSA_E_SIZE=0x10
+CONFIG_RSA_C_SIZE=0x20
+CONFIG_SPL_LZMA=y
+CONFIG_SPL_GZIP=y
+CONFIG_ERRNO_STR=y
+# CONFIG_EFI_LOADER is not set
--- a/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c
+++ b/sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c
@@ -2288,6 +2288,11 @@ int mmc_start_init(struct mmc *mmc)

 	/* Test for SD version 2 */
 	err = mmc_send_if_cond(mmc);
+  if (err) {
+    mmc_go_idle(mmc);
+	  mmc_get_blk_desc(mmc)->hwpart = 0;
+	  mmc_send_if_cond(mmc);
+  }

 	/* Now try to get the SD card's operating condition */
 	err = sd_send_op_cond(mmc);
--- a/sysdrv/source/uboot/u-boot/include/boot_rkimg.h
+++ b/sysdrv/source/uboot/u-boot/include/boot_rkimg.h
@@ -20,6 +20,7 @@ enum _boot_mode {
 	BOOT_MODE_WATCHDOG,
 	BOOT_MODE_DFU,
 	BOOT_MODE_QUIESCENT,
+	BOOT_MODE_UBOOT_TERMINAL,
 	BOOT_MODE_UNDEFINE,
 };