mirror of
https://github.com/LuckfoxTECH/luckfox-pico.git
synced 2026-01-18 03:28:19 +01:00
Pullrequest mis5001 clear patch 0305 (#242)
* project/app : Add uvc_app_tiny application Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC/overlay : Add Ubuntu system support for Rockit and RKNN libraries Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/of : Add support for dynamic device tree Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/usb/serial : Add CH343 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/staging : Disable partial logging of fbtft Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/pinctrl/pinctrl-rockchip.h : Fix pinctrl configuration failure issue Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/include/dt-bindings/soc/rockchip,boot-mode.h : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/video : Add logo display support for LF40-480480-ARK and LF40-720720-ARK Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/boot/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm/configs : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/drivers/mmc/mmc.c : Fix the issue where some Micro SD cards fail to boot Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/common/image-fit.c : Add U-Boot support for luckfox-config Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/rkbin/bin/rv11 : Add firmware with a serial baud rate of 115200 and back up the original firmware Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/arch/arm/dts : Add device tree files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot/configs : Add defconfig files for the Luckfox RV1103/RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/uboot/u-boot : Add support for the reboot U-Boot command in the BusyBox system Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/drivers/media/i2c : Add MIS5001 driver support Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/source/kernel/arch/arm : Add default support for MIS5001 on Luckfox RV1106 series boards Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board : Delete irrelevant overwrite files and patch files Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/drv_ko/insmod_ko.sh : Register mis5001 driver during boot process Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * media/isp/release_camera_engine_rkaiq_rv1106_arm-rockchip830-linux-uclibcgnueabihf/isp_iqfiles : Add mis5001 iqfile Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/app/rkipc/rkipc/src/rv1106_ipc : Add rkipc application support for mis5001 sensor Signed-off-by: eng29 <eng29@luckfox.com> * project/cfg/BoardConfig_IPC : Enable default retrieval of mis5001 iqfile and include ROCKIT and RKNN libraries of RV1106 series board Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * project/build.sh : Remove operations related to applying and deleting patches Signed-off-by: eng29 <eng29@luckfox.com> * project/build.sh : Modify build system menu description; Apply lightweight system processing only during Buildroot and BusyBox system compilation Signed-off-by: eng29 <eng29@luckfox.com> * sysdrv/tools/board/buildroot/luckfox_pico_w_defconfig : Add pppd and pgrep for 4G module Signed-off-by: luckfox-eng29 <eng29@luckfox.com> * sysdrv/tools/board/kernel/rv1106-luckfox-pico-ultra-ipc.dtsi : Add uart4m1 support for lastest luckfox-config tool Signed-off-by: eng29 <eng29@luckfox.com> --------- Signed-off-by: luckfox-eng29 <eng29@luckfox.com> Signed-off-by: eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29
GitHub
410
sysdrv/source/kernel/arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi
Executable file
410
sysdrv/source/kernel/arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi
Executable file
@@ -0,0 +1,410 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include "rv1106-amp.dtsi"
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/ {
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk1p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
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};
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acodec_sound: acodec-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rv-acodec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&acodec>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_arm: vdd-arm {
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compatible = "regulator-fixed";
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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};
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leds: leds {
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compatible = "gpio-leds";
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work_led: work{
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gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "activity";
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default-state = "on";
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};
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};
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// DHT11
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dht11_sensor {
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compatible = "dht11";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_pc7>;
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dht11@1 {
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gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
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label = "dht11";
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linux,default-trigger = "humidity";
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};
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};
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};
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/***************************** AUDIO ********************************/
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&i2s0_8ch {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&acodec {
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#sound-dai-cells = <0>;
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pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/***************************** CPU ********************************/
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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/***************************** ADC ********************************/
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&tsadc {
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status = "okay";
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};
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/***************************** USB *********************************/
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon = <&u2phy>;
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status = "okay";
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};
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/*****************************CSI ********************************/
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3336_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&sc4336_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input2: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&sc530ai_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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sc3336: sc3336@30 {
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compatible = "smartsens,sc3336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2119-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3336_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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sc4336: sc4336@30 {
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compatible = "smartsens,sc4336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "OT01";
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rockchip,camera-module-lens-name = "40IRC_F16";
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port {
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sc4336_out: endpoint {
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remote-endpoint = <&csi_dphy_input1>;
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data-lanes = <1 2>;
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};
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};
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};
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sc530ai: sc530ai@30 {
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compatible = "smartsens,sc530ai";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2115-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc530ai_out: endpoint {
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remote-endpoint = <&csi_dphy_input2>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
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remote-endpoint = <&isp_in>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port@0 {
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isp_in: endpoint {
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remote-endpoint = <&mipi_lvds_sditf>;
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};
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};
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};
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/***************************** PINCTRL ********************************/
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// SPI
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&spi0 {
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pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
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#address-cells = <1>;
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#size-cells = <0>;
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spidev@0 {
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compatible = "rockchip,spidev";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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fbtft@0{
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compatible = "sitronix,st7789v";
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reg = <0>;
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spi-max-frequency = <20000000>;
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fps = <30>;
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buswidth = <8>;
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debug = <0x7>;
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led-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;//BL
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dc-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; //DC
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reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; //RES
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};
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};
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// I2C
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&i2c3 {
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pinctrl-0 = <&i2c3m1_xfer>;
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};
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&i2c0 {
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pinctrl-0 = <&i2c0m2_xfer>;
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};
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// UART
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&uart3 {
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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pinctrl-0 = <&uart4m1_xfer>;
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};
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&uart5 {
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pinctrl-0 = <&uart5m0_xfer>;
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};
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// PWM
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&pwm0 {
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pinctrl-0 = <&pwm0m0_pins &pwm0m1_pins>;
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};
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&pwm1 {
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pinctrl-0 = <&pwm1m0_pins>;
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};
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&pwm2 {
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pinctrl-0 = <&pwm2m2_pins>;
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};
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&pwm3 {
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pinctrl-0 = <&pwm3m2_pins>;
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};
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&pwm4 {
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pinctrl-0 = <&pwm4m2_pins>;
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};
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&pwm5 {
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pinctrl-0 = <&pwm5m2_pins>;
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};
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&pwm6 {
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pinctrl-0 = <&pwm6m2_pins>;
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};
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&pwm8 {
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pinctrl-0 = <&pwm8m0_pins &pwm8m1_pins>;
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};
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&pwm9 {
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pinctrl-0 = <&pwm9m0_pins &pwm9m1_pins>;
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};
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&pwm10 {
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pinctrl-0 = <&pwm10m0_pins &pwm10m1_pins>;
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};
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&pwm11 {
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pinctrl-0 = <&pwm11m0_pins &pwm11m1_pins>;
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};
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&pinctrl {
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spi0 {
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spi0m0_clk: spi0m0-clk {
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rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
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};
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spi0m0_mosi: spi0m0-mosi {
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rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
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};
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spi0m0_miso: spi0m0-miso {
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rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
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};
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spi0m0_cs0: spi0m0-cs0 {
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rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
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};
|
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};
|
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|
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gpio1-pc7 {
|
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gpio1_pc7:gpio1-pc7 {
|
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rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
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};
|
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};
|
||||
};
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85
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
Executable file
85
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts
Executable file
@@ -0,0 +1,85 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Mini";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
95
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-plus.dts
Executable file
95
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-plus.dts
Executable file
@@ -0,0 +1,95 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Plus";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C0_M2 */
|
||||
&i2c0 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
66
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-webbee.dts
Executable file
66
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-webbee.dts
Executable file
@@ -0,0 +1,66 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico WebBee";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
};
|
||||
|
||||
/**********SFC**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********CSI**********/
|
||||
&i2c4{
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/********AUDIO**********/
|
||||
&i2s0_8ch {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
status = "disabled";
|
||||
};
|
||||
157
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico.dts
Executable file
157
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico.dts
Executable file
@@ -0,0 +1,157 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1103.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1103-luckfox-pico-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
|
||||
|
||||
gpio4pa4:gpio4pa4 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa4>;
|
||||
regulator-name = "gpio4_pa4";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa3:gpio4pa3 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa3>;
|
||||
regulator-name = "gpio4_pa3";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa2:gpio4pa2 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa2>;
|
||||
regulator-name = "gpio4_pa2";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pa6:gpio4pa6 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pa6>;
|
||||
regulator-name = "gpio4_pa6";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pb0:gpio4pb0 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pb0>;
|
||||
regulator-name = "gpio4_pb0";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
gpio4pb1:gpio4pb1 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pb1>;
|
||||
regulator-name = "gpio4_pb1";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
/**********GPIO***********/
|
||||
&pinctrl{
|
||||
gpio {
|
||||
gpio4_pa4:gpio4-pa4 {
|
||||
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa3:gpio4-pa3 {
|
||||
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa2:gpio4-pa2 {
|
||||
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pa6:gpio4-pa6 {
|
||||
rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pb0:gpio4-pb0 {
|
||||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
gpio4_pb1:gpio4-pb1 {
|
||||
rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
/* SPI0_M0 */
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********PWM**********/
|
||||
/* PWM1_M0 */
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
381
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-pro-max-ipc.dtsi
Executable file
381
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-pro-max-ipc.dtsi
Executable file
@@ -0,0 +1,381 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
#include "rv1106-amp.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk1p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
|
||||
};
|
||||
|
||||
acodec_sound: acodec-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "rv-acodec";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
// DHT11
|
||||
dht11_sensor {
|
||||
compatible = "dht11";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_pc7>;
|
||||
|
||||
dht11@1 {
|
||||
gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
label = "dht11";
|
||||
linux,default-trigger = "humidity";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/***************************** AUDIO ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
/***************************** CPU ********************************/
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
/***************************** ADC ********************************/
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** CSI ********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&mis5001_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3336: sc3336@30 {
|
||||
compatible = "smartsens,sc3336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2119-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mis5001: mis5001@31 {
|
||||
compatible = "imagedesign,mis5001";
|
||||
status = "okay";
|
||||
reg = <0x31>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2115-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
mis5001_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input1>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/*****************************PINCTRL********************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
fbtft@0{
|
||||
compatible = "sitronix,st7789v";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
fps = <30>;
|
||||
buswidth = <8>;
|
||||
debug = <0x7>;
|
||||
led-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;//BL
|
||||
dc-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; //DC
|
||||
reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; //RES
|
||||
};
|
||||
};
|
||||
// I2C
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&i2c0m2_xfer>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1m1_xfer>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m1_xfer &i2c3m0_xfer>;
|
||||
};
|
||||
|
||||
// &i2c4 {
|
||||
// pinctrl-0 = <&i2c4m0_xfer>;
|
||||
// };
|
||||
|
||||
// UART
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
||||
};
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio1-pc7 {
|
||||
gpio1_pc7:gpio1-pc7 {
|
||||
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
565
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-ultra-ipc.dtsi
Executable file
565
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-ultra-ipc.dtsi
Executable file
@@ -0,0 +1,565 @@
|
||||
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
status = "okay";
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm1 0 100000 50000>;
|
||||
brightness-levels = <
|
||||
0 1 2 3 4 5 6 7
|
||||
8 9 10 11 12 13 14 15
|
||||
16 17 18 19 20 21 22 23
|
||||
24 25 26 27 28 29 30 31
|
||||
32 33 34 35 36 37 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255>;
|
||||
default-brightness-level = <255>;
|
||||
};
|
||||
|
||||
panel: panel {
|
||||
compatible = "simple-panel";
|
||||
backlight = <&backlight>;
|
||||
|
||||
reset-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-ms = <200>;
|
||||
status = "okay";
|
||||
|
||||
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
|
||||
width-mm = <85>;
|
||||
height-mm = <85>;
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
|
||||
timing0: timing0 {
|
||||
clock-frequency = <30000000>;
|
||||
hactive = <720>;
|
||||
vactive = <720>;
|
||||
hback-porch = <44>;
|
||||
hfront-porch = <46>;
|
||||
vback-porch = <18>;
|
||||
vfront-porch = <16>;
|
||||
hsync-len = <2>;
|
||||
vsync-len = <2>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
panel_in_rgb: endpoint {
|
||||
remote-endpoint = <&rgb_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
status = "okay";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
drm_logo: drm-logo@00000000 {
|
||||
compatible = "rockchip,drm-logo";
|
||||
reg = <0x0 0x0>;
|
||||
};
|
||||
linux,cma {
|
||||
status = "okay";
|
||||
compatible = "shared-dma-pool";
|
||||
inactive;
|
||||
reusable;
|
||||
size = <0xA00000>; //10M
|
||||
linux,cma-default;
|
||||
};
|
||||
mmc_ecsd: mmc@3f000 {
|
||||
reg = <0x3f000 0x00001000>;
|
||||
};
|
||||
};
|
||||
|
||||
acodec_sound: acodec-sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "rv1106-acodec";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
||||
|
||||
dsm_sound: dsm-sound {
|
||||
status = "disabled";
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,name = "rockchip,dsm-sound";
|
||||
simple-audio-card,bitclock-master = <&sndcodec>;
|
||||
simple-audio-card,frame-master = <&sndcodec>;
|
||||
sndcpu: simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
sndcodec: simple-audio-card,codec {
|
||||
sound-dai = <&dsm>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_arm: vdd-arm {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_arm";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** audio ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/************************* FIQ_DUBUGGER ****************************/
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** USB *********************************/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&u2phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** DSM *********************************/
|
||||
&dsm {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu-supply = <&vdd_arm>;
|
||||
};
|
||||
|
||||
/*************************** CSI *********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
|
||||
csi_dphy_input1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&mis5001_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
// pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3336: sc3336@30 {
|
||||
compatible = "smartsens,sc3336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2119-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mis5001: mis5001@31 {
|
||||
compatible = "imagedesign,mis5001";
|
||||
status = "okay";
|
||||
reg = <0x31>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT2115-PC1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
mis5001_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input1>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** ADC ********************************/
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**************************** LCD/TP ******************************/
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm1m2_pins>;
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
logo-memory-region = <&drm_logo>;
|
||||
};
|
||||
|
||||
&rgb {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
|
||||
ports {
|
||||
rgb_out: port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rgb_out_panel: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&panel_in_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rgb_in_vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&route_rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
GT911:touchscreen {
|
||||
compatible = "goodix,gt911";
|
||||
reg = <0x14>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
/**************************** PINCTRL ******************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
// I2C
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1m1_xfer>;
|
||||
};
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2m0_xfer>;
|
||||
};
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m0_xfer &i2c3m1_xfer &i2c3m2_xfer &tp_rst &tp_irq>;
|
||||
};
|
||||
&i2c4 {
|
||||
pinctrl-0 = <&i2c4m0_xfer &i2c4m1_xfer &i2c4m2_xfer>;
|
||||
};
|
||||
|
||||
// UART
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
||||
};
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m0_xfer &uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m0_xfer &uart4m1_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m1_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m1_pins &pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m0_pins &pwm4m1_pins &pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm7 {
|
||||
pinctrl-0 = <&pwm7m0_pins &pwm7m1_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen {
|
||||
tp_rst:tp-rst {
|
||||
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
tp_irq:tp-irq {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
129
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-max.dts
Executable file
129
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-max.dts
Executable file
@@ -0,0 +1,129 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Max";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********FLASH**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
rockchip,dis-u2-susphy;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C1_M1 */
|
||||
&i2c1 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -0,0 +1,71 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106g-evb2-v10.dts"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pro Max";
|
||||
compatible = "rockchip,rv1106g-evb2-v12", "rockchip,rv1106";
|
||||
|
||||
chosen {
|
||||
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/delete-node/ &thunder_boot_spi_nor;
|
||||
|
||||
&emmc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,baudrate = <115200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer>;
|
||||
};
|
||||
|
||||
&rkisp_thunderboot {
|
||||
/* reg's offset MUST match with RTOS */
|
||||
/*
|
||||
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
|
||||
* e.g. 2304x1296: 0xf30000
|
||||
*/
|
||||
reg = <0x00860000 0xf30000>;
|
||||
};
|
||||
|
||||
&ramdisk_r {
|
||||
reg = <0x1790000 (20 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&ramdisk_c {
|
||||
reg = <0x2b90000 (16 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
106
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pro.dts
Executable file
106
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pro.dts
Executable file
@@ -0,0 +1,106 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb.dtsi"
|
||||
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Pro";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106";
|
||||
};
|
||||
|
||||
/**********FLASH**********/
|
||||
&sfc {
|
||||
status = "okay";
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********SDMMC**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
rockchip,dis-u2-susphy;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
fbtft@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/**********I2C**********/
|
||||
/* I2C3_M1 */
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* I2C1_M1 */
|
||||
&i2c1 {
|
||||
status = "disabled";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
|
||||
/**********UART**********/
|
||||
/* UART3_M1 */
|
||||
&uart3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* UART4_M1 */
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
250
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra-fastboot.dts
Executable file
250
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra-fastboot.dts
Executable file
@@ -0,0 +1,250 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2024 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
//#include "rv1106-tb-nofastae-emmc.dtsi"
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb-v10.dtsi"
|
||||
#include "rv1106-thunder-boot-emmc.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Ultra";
|
||||
compatible = "rockchip,rv1106g-evb1-v11", "rockchip,rv1106";
|
||||
chosen {
|
||||
bootargs = "loglevel=0 rootfstype=erofs rootflags=dax console=ttyFIQ0 root=/dev/rd0 snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0 driver_async_probe=dwmmc_rockchip";
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work{
|
||||
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "activity";
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/***************************** audio ********************************/
|
||||
&i2s0_8ch {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&acodec {
|
||||
#sound-dai-cells = <0>;
|
||||
pa-ctl-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** emmc *******************************/
|
||||
&emmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** csi ********************************/
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input0: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&sc3338_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
rockchip,amp-shared;
|
||||
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
sc3338: sc3338@30 {
|
||||
compatible = "smartsens,sc3338";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "FKO1";
|
||||
rockchip,camera-module-lens-name = "30IRC-F16";
|
||||
port {
|
||||
sc3338_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
memory-region-thunderboot = <&rkisp_thunderboot>; //thunderboot
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/***************************** ethernet ****************************/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** fiq ********************************/
|
||||
&fiq_debugger {
|
||||
rockchip,baudrate = <115200>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2m1_xfer>;
|
||||
};
|
||||
|
||||
/***************************** usb ********************************/
|
||||
&usbdrd_dwc3 {
|
||||
extcon = <&u2phy>;
|
||||
//dr_mode = "peripheral";//for rndis
|
||||
dr_mode = "otg"; //for uvc
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/***************************** other ******************************/
|
||||
&mailbox {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/********************** thunder-boot ******************************/
|
||||
&thunder_boot_service {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_thunderboot {
|
||||
/* reg's offset MUST match with RTOS */
|
||||
/*
|
||||
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
|
||||
* e.g. 2304x1296: 0xf30000
|
||||
*/
|
||||
reg = <0x00860000 0xf30000>;
|
||||
};
|
||||
|
||||
&ramdisk_r {
|
||||
reg = <0x1790000 (40 * 0x00100000)>;
|
||||
};
|
||||
|
||||
&ramdisk_c {
|
||||
reg = <0x3f90000 (20 * 0x00100000)>;
|
||||
};
|
||||
147
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra-w.dts
Executable file
147
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra-w.dts
Executable file
@@ -0,0 +1,147 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-luckfox-pico-ultra-ipc.dtsi"
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
model = "Luckfox Pico Ultra W";
|
||||
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
|
||||
|
||||
restart-poweroff {
|
||||
compatible = "restart-poweroff";
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wireless_bluetooth: wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
uart_rts_gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,wake_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
/**********CRU**********/
|
||||
//&cru {
|
||||
// assigned-clocks =
|
||||
// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|
||||
// <&cru ARMCLK>,
|
||||
// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
|
||||
// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
|
||||
// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
|
||||
// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
|
||||
// assigned-clock-rates =
|
||||
// <1188000000>, <700000000>,
|
||||
// <1104000000>,
|
||||
// <400000000>, <200000000>,
|
||||
// <100000000>, <300000000>,
|
||||
// <100000000>, <100000000>,
|
||||
// <200000000>, <700000000>;
|
||||
//};
|
||||
|
||||
/**********NPU**********/
|
||||
//&npu {
|
||||
// assigned-clock-rates = <700000000>;
|
||||
//};
|
||||
|
||||
/**********EMMC**********/
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
// mmc-hs200-1_8v;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
memory-region-ecsd = <&mmc_ecsd>;
|
||||
post-power-on-delay-ms = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********SDIO-WIFI**********/
|
||||
&sdmmc {
|
||||
max-frequency = <50000000>;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
rockchip,default-sample-phase = <90>;
|
||||
// no-sd;
|
||||
// no-mmc;
|
||||
supports-sdio;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl{
|
||||
sdmmc0{
|
||||
sdmmc0_det: sdmmc0-det {
|
||||
rockchip,pins =
|
||||
/* sdmmc0_det */
|
||||
<3 RK_PA1 1 &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/**********ETH**********/
|
||||
&gmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********USB**********/
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
#dr_mode = "host";
|
||||
};
|
||||
|
||||
/**********RTC**********/
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/**********BT**********/
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/**********SPI**********/
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
spidev@0 {
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
81
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra.dts
Executable file
81
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-ultra.dts
Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1106.dtsi"
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#include "rv1106-luckfox-pico-ultra-ipc.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/display/media-bus-format.h>
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/ {
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model = "Luckfox Pico Ultra";
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compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
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};
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/**********CRU**********/
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//&cru {
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// assigned-clocks =
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// <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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// <&cru ARMCLK>,
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// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
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// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
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// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
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// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
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// assigned-clock-rates =
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// <1188000000>, <700000000>,
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// <1104000000>,
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// <400000000>, <200000000>,
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// <100000000>, <300000000>,
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// <100000000>, <100000000>,
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// <200000000>, <700000000>;
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//};
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/**********NPU**********/
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//&npu {
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// assigned-clock-rates = <700000000>;
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//};
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/**********EMMC**********/
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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// mmc-hs200-1_8v;
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rockchip,default-sample-phase = <90>;
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no-sdio;
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no-sd;
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memory-region-ecsd = <&mmc_ecsd>;
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post-power-on-delay-ms = <0>;
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status = "okay";
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};
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&fiq_debugger {
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rockchip,irq-mode-enable = <1>;
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status = "okay";
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};
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/**********ETH**********/
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&gmac {
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status = "okay";
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};
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/**********USB**********/
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&usbdrd_dwc3 {
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status = "okay";
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dr_mode = "peripheral";
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};
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/**********RTC**********/
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&rtc {
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status = "okay";
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};
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/**********SPI**********/
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&spi0 {
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status = "disabled";
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spidev@0 {
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spi-max-frequency = <50000000>;
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||||
};
|
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};
|
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